Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Tunneling through region of reduced conductivity
Patent
1997-02-21
1998-08-11
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Tunneling through region of reduced conductivity
257 33, 257 35, 505190, H01L 2906
Patent
active
057930562
ABSTRACT:
A technique for defining the active area of a high-T.sub.c superconductor Josephson junction uses an epitaxial slotted insulator patterned over the edge of the superconductor thin film-insulator bilayer. The superconductor
ormal-metal/superconductor edge junction formed between the slotted insulator has a small active area. The counter electrode provided as an interconnect of the junction can therefore be wider than the active area of the edge junction since it can overlap onto the patterned slotted insulator. The use of the slotted insulator enables fabrication of junctions having resistances and critical currents in the desired range for high-T.sub.c superconductor circuits while enabling the use of wide, low inductance interconnects.
REFERENCES:
patent: 5304538 (1994-04-01), Vasquez et al.
patent: 5696392 (1997-12-01), Char et al.
Forrester Martin G.
Hunt Brian D.
Crane Sara W.
Northrop Grumman Corporation
Sutcliff Walter G.
Wille Douglas A.
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