Low inductance chip with center via contact

Electricity: electrical systems and devices – Electrostatic capacitors – Fixed capacitor

Reexamination Certificate

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C361S321200, C361S329000

Reexamination Certificate

active

06477032

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention generally relates to multi-layer ceramic capacitors (MLCS) adapted to be mounted to the surface of a circuit board. Further, the invention relates to a surface mount MLC device mounted on a circuit board and having a contact arrangement of alternating layers to achieve low inductance. More precisely, the present invention relates to a surface mount MLC device with a terminal arrangement providing low inductance for decoupling applications, such as high-speed microprocessor applications.
Advanced semiconductor circuits, particularly VLSI chips, almost universally employ decoupling capacitors. The decoupling capacitors are generally charged independent of circuit operation and are discharged to deliver a current that enables fast transition circuit switching with minimum noise. Closer physical location of the capacitor to the circuit allows for and is essential for higher switching speeds of the chip. If utilized in this manner, not only is the capacitance of the component important, but additionally, its inductance is crucial to overall performance.
In decoupling today's high speed digital circuits the capacitor is primarily being used to eliminate high-speed transient noise which is above its resonance point. In these applications it is desirable to maintain as low an inductance as possible. When a capacitor is mounted on a board, lead lengths and board lines are a major source of inductance. This inductance must be minimized to obtain good decoupling performance under high-speed transient conditions. The use of multiple capacitors instead of a few large bulk capacitors can be used to reduce inductance and gain more efficient surge-current availability.
While a large number of prior art capacitive devices are known, none is believed to be directly pertinent to low inductance surface mount MLC devices for decoupling applications, such as high-speed microprocessing. Prior art discoidal capacitors with through-holes are shown in references such as U.S. Pat. Nos. 4,148,003, 5,177,633 and 4,247,881. While useful for their purpose, none of the prior art capacitive devices disclose or suggest a surface mount MLC in a generally square configuration for use in low inductance decoupling applications.
It is, therefore, desirable to provide an MLC, generally square-shaped, which exhibits low inductance and is capable of surface mounting on a circuit board for decoupling applications, such as high-speed microprocessing, with a first terminal around substantially the entire periphery of the device and a second opposing polarity terminal located by way of a through-via generally in the center of the device body.
SUMMARY OF THE INVENTION
The present invention recognizes and addresses various of the foregoing limitations and drawbacks, and others, concerning the lack of a surface mount multi-layer ceramic capacitor (MLC) device for low inductance decoupling applications. Therefore, the present invention provides an MLC device, generally square in configuration, for decoupling high frequency transients, in which the device has a first terminal substantially located around the entire periphery of the device and a second opposing polarity terminal located by way of a through-via in generally the middle of the device body.
It is, therefore, a principle object of the subject invention to provide an MLC device. More specifically, it is an object of the present device to provide an MLC device which exhibits a low inherent inductance. Most specifically, it is an object of the present invention to provide an MLC device with low inductance characteristics and a high capacitance/area which is readily adaptable to variation in size and dimension yet simple to manufacture and cost effective.
It is a further object of the present invention to provide a generally square-shaped MLC device. It is still after object to provide a generally square-shaped MLC device with a first terminal located substantially around the entire periphery of the device. It is still a further object of the present invention to provide a generally square-shaped MLC device with a first terminal located substantially around the entire periphery of the device and a second opposing polarity terminal located by way of a through-via in generally the middle of the device body.
It is yet another object of the present invention to provide a single MLC device capable of making connection with numerous contacts located on the circuit board. It is still another object of the present invention to provide a multi-chip array comprised of a plurality of surface mount MLC devices in which the devices are arranged in a diamond pattern for high-speed microprocessor applications.
Additional objects and advantages of the invention are set forth in, or will be apparent to those of ordinary skill in the art from, the detailed description to as follows. Also, it should be further appreciated that modifications and variations to the specifically illustrated and discussed features and materials hereof may be practiced in various embodiments and uses of this invention without departing from the spirit and scope thereof, by virtue of present reference thereto. Such variations may include, but are not limited to, substitutions of the equivalent means, features, and materials for those shown or discussed, and the functional or positional reversal of various parts, features, or the like.
Still further, it is to be understood that different embodiments, as well as different presently preferred embodiments, of this invention, may include various combinations or configurations of presently disclosed features, elements, or their equivalents (including combinations of features or configurations thereof not expressly shown in the figures or stated in the detailed description).
These and other features, aspects and advantages of the present invention will become better understood with reference to the following description and appended claims. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate an embodiment of the invention and, together with the description, serve to explain the principles of the invention.
In one exemplary embodiment, a square capacitor device is provided having a ceramic body formed from a plurality of ceramic-electrode layers interleaved to form a stack. The stack is pressed and sintered to achieve a substantially unitary capacitor body. A first polarity terminal is located substantially about the entire periphery of the device body. A second polarity terminal is formed by a through-via located generally in the middle of the device body. The through-via may or may not be filled with solder.
In another exemplary embodiment, an array of surface mount MLC devices are mounted on a circuit board for use in low inductance decoupling applications, such as a high-speed microprocessor. The MLC devices are mounted in a diamond arrangement such that contacts of one polarity will be electrically connected to a first terminal located substantially about the entire periphery of the device body on each of such devices with direct electrical connection occurring at the comers of the device body. Contacts of an opposing polarity may be electrically connected to a through-via terminal located generally in the middle of each device body.
In a third embodiment of the present invention, a single surface mount MLC device is provided which makes electrical connection with a plurality of contact points on a circuit board. In this embodiment, all terminals of the device are formed by through-vias which align with respective contacts on the circuit board.


REFERENCES:
patent: 3177415 (1965-04-01), Kater
patent: 3426257 (1969-02-01), Youngquist
patent: 4148003 (1979-04-01), Colburn et al.
patent: 4247881 (1981-01-01), Coleman
patent: 4349862 (1982-09-01), Bajorek et al.
patent: 4419714 (1983-12-01), Locke
patent: 4430690 (1984-02-01), Chance et al.
patent: 4439813 (1984-03-01), Dougherty et al.
patent: 4706162 (1987-11-01), Hernandez et al.
patent: 4831494 (1989-05-01), A

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