Low impedance semiconductor integrated circuit

Details Low impedance semiconductor integrated circuit Low impedance semiconductor integrated circuit

2005-06-21

2005-06-21

Faber, Alan T. (Department: 2651)

Dynamic magnetic information storage or retrieval

General recording or reproducing

Specifics of biasing or erasing

C360S067000

Reexamination Certificate

active

06909569

ABSTRACT:
One circuit generates a constant positive potential, another circuit generates a constant negative potential. The positive potential and the negative potential are applied to a magneto-resistive head that reads data from and writes data to a magnetic disk. The positive potential is generated using a positive voltage source, an operational amplifier, and an NMOS transistor. The negative potential is generated using a negative voltage source, an operational amplifier, and a PMOS transistor.

REFERENCES:
patent: 2002/0048110 (2002-04-01), Sako et al.
patent: 138201 (1996-05-01), None
patent: 268302 (2000-09-01), None

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