Low gate oxide stress power amplifier

Amplifiers – With semiconductor amplifying device – Including protection means

Reexamination Certificate

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Details

C330S253000, C330S277000, C330S311000

Reexamination Certificate

active

07109801

ABSTRACT:
A power amplifier includes an input transistor, an output transistor, and circuitry. The input transistor includes an input, a first node, and a second node, wherein the second node of the input transistor is coupled to a supply voltage return and the input of the input transistor operably coupled to receive an outbound radio frequency (RF) signal. The output transistor includes an input, a first node, and a second node, wherein the first node of the output transistor is coupled to provide an output of the power amplifier, the second node of the output transistor is coupled to the first node of the input transistor. The circuitry is operably coupled to provide an enabling bias voltage to the input of the input transistor and to the input of the output transistor during the transmit mode and to provide a disabling bias voltage to the input of the input transistor and to the input of the output transistor during the power down mode, wherein the disabling bias voltage is of a value to distribute gate oxide stress between the input transistor and the output transistor.

REFERENCES:
patent: 6636114 (2003-10-01), Tsutsui et al.
patent: 6667657 (2003-12-01), Nakatani et al.

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