Low gain voltage-controlled oscillator

Oscillators – Automatic frequency stabilization using a phase or frequency... – Particular frequency control means

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

331 57, 331177R, 331179, 331DIG2, H03L 706, H03L 7185

Patent

active

057572402

ABSTRACT:
A voltage controlled-oscillator ring oscillator having an adjustable high-frequency reference and an adjustable low-frequency reference. A mixer and a plurality of delay elements comprise a delay interpolating oscillator ring. The mixer receives a high-frequency reference input signal from a first multiplexer which selects the output of one of several delay elements having relatively short delay loop paths. The mixer receives a low-frequency reference input signal from a second multiplexer which selects the output of one of several delay elements having relatively long delay loop paths. The frequency of the mixer output is continually adjustable between the high-frequency reference and the low-frequency reference. As operating conditions change the first and second multiplexers can select the outputs of different delay elements in order to change the frequency of the high-frequency and low-frequency references.

REFERENCES:
patent: 5075640 (1991-12-01), Miyazawa
patent: 5260979 (1993-11-01), Parker et al.
patent: 5304955 (1994-04-01), Atriss et al.
patent: 5475344 (1995-12-01), Naneatis et al.
Alvarez, Jose, et al., A Wide-Bandwidth Low-Voltage PLL for PowerPC.TM. Microprocessors, IEEE Journal of Solid-State Circuits, vol. 30, No. 4, Apr. 1995, pp. 383-391.
Enam, S. Khursheed, et al., "NMOS IC's for Clock and Data Regeneration in Gigabit-per-Second Optical-Fiber Receivers," IEEE Journal of Solid-State Circuits, vol. 27, No. 12, Dec. 1992, pp. 1763-1774.
Novof, Ilya, et al., "Fully-Integrated CMOS Phase-Locked Loop with 15 tro 240 MHz Locking Range and .+-.50 ps Jitter," 1995 IEEE International Solid State Circuits Conference--Digest of Technical Papers, Feb. 16, 1995, pp. 112-113.
Young, Ian A., et al., A PLL Clock Generator with 5 to 110 MHz of Lock Range for Microprocessors, IEEE Journal of Solid-State Circuits, vol 27, No. 11, Nov. 1992, pp. 1599-1607.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Low gain voltage-controlled oscillator does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Low gain voltage-controlled oscillator, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low gain voltage-controlled oscillator will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1966295

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.