Low frequency common mode rejection in a clock circuit

Details Low frequency common mode rejection in a clock circuit Low frequency common mode rejection in a clock circuit

1994-05-16

1996-07-02

Tse, Young T.

Pulse or digital communications

Cable systems and components

375318, 333 33, 34031005, H04B 306

Patent

active

055330533

ABSTRACT:
A method and apparatus for passing a high frequency signal across an isolation barrier while rejecting low frequency common mode interference is provided. A high frequency signal is coupled across an isolation barrier. A circuit comprising an element having an impedance that is a function of frequency rejects low frequency common mode interference. The high frequency signal is provided as an output. The present invention is useful, for example, for isolating telephone apparatus, such as a telephone modem, from a telephone line.

REFERENCES:
patent: 4493092 (1985-01-01), Adams
patent: 4556864 (1985-12-01), Roy
patent: 4697166 (1987-09-01), Warnagiris et al.
patent: 5253249 (1993-10-01), Fitzgerald et al.
patent: 5325395 (1994-06-01), Tran
IBM Technical Disclosure Bulletin vol. 32 No. 2 Jul. 1989.

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