Low dropout voltage regulator circuit including gate offset...

Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...

Reexamination Certificate

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C323S274000, C330S291000

Reexamination Certificate

active

06188212

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to low drop out (LDO) voltage regulators, and more particularly to improvements therein which allow use of a smaller charge pump to generate a high voltage to be used in generating a high gate voltage on the gate of the output transistor to enable it to supply a predetermined load current; the invention also relates to improvements which preserve load transient response of LDO voltage regulators at low, usually unregulated input voltages.
FIG. 1
illustrates a low drop out voltage regulator which is believed to be the closest prior art. An unregulated power supply voltage V
IN
is applied by conductor
13
to the drain of an N-channel transistor
18
. The source of transistor
18
is connected to output conductor
19
on which the regulated voltage V
OUT
is produced. The “drop out voltage” is the voltage between the drain and source of transistor
18
, which is referred to as the “pass transistor”, or simply the “output transistor”. The gate of transistor
18
is driven by an error amplifier
12
having its (+) input connected to a precision, temperature-stable reference voltage V
REF
. A voltage divider including resistors
20
and
22
is connected between V
OUT
and ground, and provides feedback by conductor
21
to the (−) input of error amplifier
12
.
A problem faced by designers of LDO voltage regulators is how to get the voltage V
GATE
on conductor
17
large enough to turn on output transistor
18
hard enough to supply a specified output current at the specified minimum drop out voltage across transistor
18
when the unregulated supply voltage V
IN
is only slightly higher than the desired regulated output voltage V
OUT
. The “worst case”, i.e., lowest, value of the unregulated supply voltage V
IN
might be only a few tenths of a volt higher than the desired regulated value of V
OUT
. Under these conditions, the value of V
GATE
required on conductor
17
to maintain the regulated value of V
OUT
by providing the needed output current I
OUT
might need to be a number of volts higher than the desired regulated value of V
OUT
. That is, V
GATE
might need to be substantially higher than the unregulated value of supply voltage V
IN
, because in many applications, especially battery powered applications, the unregulated supply voltage V
IN
might be only a few tenths of a volt above V
OUT
.
The closest prior art approach to solving the above described problem is to use a charge pump circuit
26
A (such as a capacitive voltage doubler circuit) to internally “boost” a voltage initially equal to a multiple of V
IN
in order to provide a high enough “boosted” supply voltage to error amplifier
12
to enable it to produce the needed high value of V
GATE
. This requires charge pump circuit
26
A of prior art
FIG. 1
to supply a high current to error amplifier
12
in order to enable it to supply enough current to rapidly charge the very large capacitance of the gate electrode of output transistor
18
to the value of V
GATE
which is required in response to a rapid change in the load current drawn by load
35
.
Unfortunately, it is very costly to provide a high current charge pump circuit
26
A, because very large capacitors and switches are required to provide the voltage doubling necessary to provide the large current required by error amplifier
12
. The problems associated with providing a high current charge pump as a power supply for the error amplifier include the need for a substantially larger amount of semiconductor chip area, introduction of switching noise in the voltage regulator, coupling of the noise to the regulated output voltage, and, in some cases, an increased number of package leads for connection to external capacitors. The easiest solution, from the designer's standpoint, has been to require the user to provide a second supply rail to the LDO regulator, but this has increased both the cost and the complexity to the user. This is not an acceptable solution for most customers.
As a practical matter, a charge pump that is implemented entirely on the same chip as an LDO voltage regulator will require a large die area to be able to supply enough current to power the error amplifier. Furthermore, as the current producing capability of the charge pump increases, so does the noise it generates and the area required for its capacitors and switches.
N-channel Power MOS transistors (MOSFETs) have been used instead of NPN transistors for an LDO output stage, and such MOSFETs have the advantage of not requiring the base current that is needed by an NPN output transistor. However, N-channel MOSFETs in an LDO voltage regulator require a substantial amount of transient current to charge their large gate capacitances in response to rapid variations in output current supplied to the load. The error amplifier driving an output N-channel MOSFET must supply this large transient current, which ultimately comes from the charge pump providing power to the error amplifier. The transient currents required by use of N-channel MOSFETs are usually larger than can be supplied by a practical, completely on-chip charge pump. If the current supplied to the error amplifier by the charge pump is too low, the error amplifier transient response to load current changes is too slow, and the overall LDO performance is unacceptable for many applications.
Furthermore, even if an on-chip charge pump can supply sufficient current to power the error amplifier in an LDO voltage regulator, the inherently noisy output characteristic of a charge pump is problematic. The output of a charge pump has significant high frequency ripple at the pump frequency, and additional noise is produced on the charge pump output when transient currents are drawn from its output capacitor, as occurs when there is a large transient in the load current supplied by an N-channel output MOSFET. It is difficult for the error amplifier to reject the high frequency noise, as the PSRR (power supply rejection ratio) of an amplifier is typically best at low frequencies and decreases at higher frequencies. Therefore, much of the charge pump ripple and noise is fed through the error amplifier and appears at the gate of the N-channel output transistor and consequently on the output voltage V
OUT
.
It is well known that the gate voltage of an output transistor configured as a source follower in an LDO voltage regulator must undergo a large change if there is a large variation in the load current. The error amplifier driving the gate voltage therefore must have a sufficient output voltage range that it does not “saturate” into the power supply voltage of the error amplifier when responding to large load current transients. If the output of the error amplifier does saturate, the error amplifier “loses control” of the output transistor, which allows the LDO voltage regulator output V
OUT
to go outside of its specified range. In low voltage LDO voltage regulators, the dynamic range of the error amplifier is limited by the small error amplifier supply voltage, so the load current transient range of the regulator is too limited for many applications.
Because of the above problems, the closest prior art has been unable to provide gate drive for the pass transistor above the input rail for the error amplifier in any way other than to power the error amplifier from a supply voltage which is higher than the unregulated input voltage V
IN
, as in the Unitrode UCCX83 and the SGS-Thomson L4955 LDO voltage regulators. In both the UCCX83 and the L4955, the error amplifier supply voltage is powered by a large on-chip charge pump.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the invention to provide an improved LDO voltage regulator capable of supplying a predetermined maximum load current by means of a minimum sized output transistor.
It is another object of the invention to provide an inexpensive improved LDO voltage regulator having a large dynamic load current range.
It is another object of the invention to provide an improved LDO voltage regulator which is capable

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