Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2002-05-20
2004-03-09
Riley, Shawn (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
C323S281000, C323S275000
Reexamination Certificate
active
06703815
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to power supply circuits. More particularly, the present invention relates to a low drop-out regulator having composite amplifier configured to provide a higher performance power supply circuit.
BACKGROUND OF THE INVENTION
The increasing demand for higher performance power supply circuits has resulted in the continued development of voltage regulator devices. Many low voltage applications are now requiring the use of low dropout (LDO) regulators, such as for use in cellular phones, pagers, laptops, camera recorders and other mobile battery operated devices. These portable electronics applications typically require low voltage and quiescent current flow to facilitate increased battery efficiency and longevity. The alternative to low drop-out regulators are switching regulators which operate as dc-dc converters. Switching regulators, though similar in function, are not preferred to low drop-out regulators in many applications because switching regulators are inherently more complex and costly, i.e., switching regulators can have higher cost, as well as increased complexity and output noise than low drop-out regulators.
Low drop-out regulators generally provide a well-specified and stable dc voltage whose input to output voltage difference is low. Low drop-out regulators typically have an error amplifier in series with a pass device, e.g., a power transistor, which is connected in series between the input and the output terminals of the low drop-out regulator. The error amplifier is configured to drive the pass device, which can then drive an output load. The operation of the low drop-out regulator is based on a control loop, which includes the feeding back of an amplified error signal used to control the output current flow of the power transistor driving the output load. The drop-out voltage of the low drop-out regulator is defined as the value of the input/output differential voltage that the control loop stops regulating. Low drop-out regulator
100
also typically requires large output capacitors that are required to have a low electrical series resistance (ESR). However, such capacitors tend to require large circuit board area, and thus are highly responsible for the overall cost of the low drop-out regulator.
Such a low drop-out regulator generally has two inherent characteristics including the magnitude of the input voltage being greater than the respective output voltage, and the output impedance being low so as to yield good performance. Low drop-out regulators can also typically be categorized as either low power or high power. Low power low drop-out regulators generally have a maximum output current of less than 1 A, and are used mainly by the above portable applications. On the other hand, high power low drop-out regulators can yield currents that are equal to or greater than 1 A at the output, which can be demanded by many automotive and industrial applications.
With reference to
FIG. 1
, a schematic diagram of a conventional low drop-out regulator
100
is illustrated. Low drop-out regulator
100
includes an error amplifier
102
and a pass device
104
configured in a feedback arrangement. Error amplifier
102
is configured to drive a low current during DC conditions, and a high current, e.g., 1 mA, under high slew or transient conditions. Error amplifier typically includes a class AB-type amplifier device. Error amplifier
102
has a positive input connected to a reference voltage V
REF
, and powered by an input supply voltage V
IN
. Reference voltage V
REF
, which usually includes a zener diode for high voltage applications or a bandgap reference for low voltage and high accuracy applications, is configured to provide a stable dc bias voltage with limited current driving capabilities.
Pass device
104
comprises a power transistor device M
P
configured for driving an output current I
OUT
to a load device. Pass device
104
has a control terminal suitably coupled to the output of error amplifier
102
and can include various configurations, such as NPN follower, NMOS follower, or common emitter PNP or common source PMOS transistors. Bipolar devices are generally used for applications requiring higher output currents and are capable of generating higher quiescent currents, while MOS devices are generally used for applications requiring minimized quiescent current. For bipolar devices, the beta &bgr; is defined as the ratio of the collector current to base current. This base current can be large and is often driven into ground, i.e., the ground current is increased considerably. For a low drop-out regulator, beta is also a measure of the efficiency, i.e., the ratio of the output current I
OUT
to the ground current. Because the bipolar device is considered a current gain device, the beta &bgr; can be quite low, ranging approximately from 100 to 1000. Thus, for every milliamp of current delivered at the output I
OUT
, 1 &mgr;A to 10 &mgr;A would be delivered to ground, i.e., for 100 mA of output current, between 100 &mgr;A and 1000 &mgr;A of ground current are realized, resulting in poor efficiency for such bipolar devices.
Accordingly, CMOS transistor pass devices are usually the best overall configuration for optimizing efficiency. In the example of
FIG. 1
, pass device
104
includes a PMOS transistor device, which typically requires very low DC current under full load conditions. Pass device
104
receives at a control terminal, e.g., gate terminal, an amplified error signal from error amplifier
102
configured to control the output current flow of pass device
104
when driving the output load at an output terminal V
OUT
. Pass device
104
is configured to feed back the error signal to error amplifier
102
.
Pass device
104
also introduces large, parasitic capacitances C
1
and C
2
to low drop-out regulator
100
. The large capacitances, for example 100 pF or more, can limit the capability of error amplifier
102
, since the capacitances require high current during a fast transition. For example, when designing devices configured to respond rapidly to changes in the output load, pass device
104
requires a large amount of current since parasitic capacitances C
1
and C
2
must be charged and discharged. Thus, in transient conditions, milliamps of current during microsecond periods must be supplied by error amplifier
102
just to charge parasitic capacitances C
1
and C
2
.
In addition to the requirement for higher current during transient conditions, other constraints are present on error amplifier
102
. For example, as currently available power systems are demanding the use of less operating supply voltage V
IN
, such as an operating voltage of 1.8 volts, low drop-out regulator has to operate within one gate-source voltage V
GS
, or approximately within a threshold voltage V
T
of the pass device plus an extra voltage &Dgr;. Thus for a single gate-source voltage V
GS
topology, to turn on pass device
104
with a threshold voltage V
T
of 0.7 to 1.2 volts, error amplifier
102
must provide at least that voltage plus the extra voltage &Dgr;, all within the limited headroom of 1.8 volts.
Another constraint on error amplifier
102
is the need to control the offset of the low drop-out regulator. In other words, not only does error amplifier
102
need to comprise a class AB device that can drive a lot of output current, while also providing a low quiescent current during low voltages, error amplifier
102
also needs to minimize the offset contribution.
Yet another constraint of error amplifier
102
is the compensation requirement. As discussed above, pass device
104
includes large parasitic capacitances, thus often requiring the implementation of a buffer, or a g
m
boost, to isolate the high output resistance of the gain stage of error amplifier
102
from the high load capacitance of pass device
104
. For example, with reference to
FIG. 2
, a low drop-out regulator
200
implementing a buffer
206
between the output of an error amplifier
202
and a pass device
204
is illustrated. Buf
Brady W. James
Riley Shawn
Swayze, Jr. W. Daniel
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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