Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2003-07-10
2004-07-20
Berhane, Adolf (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
Reexamination Certificate
active
06765374
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a voltage regulator circuit, and more particularly to a low drop-out regulator and an adaptive frequency compensation method for the same.
2. Description of the Related Art
Voltage regulators with a low drop-out (LDO) are commonly used in the power management systems of PC motherboards, notebook computers, mobile phones, and many other products. Power management systems use LDO regulators as local power supplies, where a clean output and a fast transient response are required. LDO regulators enable power management systems to efficiently supply additional voltage levels the are smaller than the main supply voltage. For example, the 5V power systems of many PC motherboards use LDO regulators to supply local chipsets with a clean 3.3V signal.
Although LDO regulators do not convert power very efficiently, they are inexpensive, small, and generate very little frequency interference. Furthermore, LDO regulators can provide a local circuit with a clean voltage that is unaffected by current fluctuations from other areas of the power system. LDO regulators are widely used to supply power to local circuits when the power consumption of the local circuit is negligible with respect to the overall load of a power system.
An ideal LDO regulator should provide a precise DC output, while responding quickly to load changes and input transients. Due to the nature of its use in mass-produced products such as computers and mobile phones, LDO regulators should also have a simple design and a low production cost.
A typical LDO regulator consists of a feedback-control loop coupled to a pass element. The feedback-control loop modulates the gate voltage of the pass element to control its impedance. Depending on the gate voltage, the pass element supplies different levels of current to an output section of the power supply. The modulation of the gate voltage is done in a manner such that the LDO regulator outputs a steady DC voltage, regardless of load conditions and input transients.
One problem with traditional LDO circuits is that they are prone to instability. The output section of a traditional LDO circuit includes an output capacitor coupled to the load. This coupling introduces a dominant pole into the feedback circuit. Traditional LDO circuits rely on the equivalent series resistance (ESR) of the output capacitor to restore stability. Within a narrow range of values, the ESR can compensate for the output pole by introducing a zero into the LDO regulator feedback-control loop. Within a range of operating conditions, the zero can increase the phase margin of the LDO regulator.
Unfortunately, the ESR is a parasitic component of the output capacitor and its value cannot easily be determined or controlled to a high precision. The ESR of a capacitor changes significantly with respect to load, temperature, and possibly other factors. If the ESR increases or decreases too much, then the ESR zero will no longer compensate for the pole introduced by the output capacitor.
Another problem with traditional LDO regulators is that the ESR adversely affects the transient response of the LDO regulator. For a LDO regulator to respond rapidly to transients, the ESR must be reduced as much as possible. However, a small ESR will shift the compensating zero of the ESR to a higher frequency, where it will no longer compensate for the pole induced by the output capacitor. In a traditional LDO regulator, the ESR cannot be reduced without threatening the stability of the entire circuit.
Another problem with traditional LDO regulators is that they have a slow transient response under light loads. Under light loads, the frequency of the output capacitor pole decreases. However, the frequency of the stabilizing zero does not change, and the cross-over frequency of the LDO regulator is reduced. Traditional LDO regulators are not designed to enable the stabilizing zero to follow the output pole. If the position of the zero could also be shifted to a lower frequency, the cross-over frequency of the LDO regulator would not be reduced under light loads.
Traditional LDO regulators are prone to instability since the ESR cannot be controlled precisely. Furthermore, their performance suffers degradation under light load conditions. Therefore, there is a need for an improved low drop-out voltage regulator that is suitable for a wider range of capacitive loads while eliminating the minimum ESR restriction of the output capacitor.
SUMMARY OF THE INVENTION
An objective of the present invention is to provide a low dropout (LDO) voltage regulator that can provide DC-DC conversion with very tight output control for computer motherboards, notebook computers, mobile phones, and other products.
Another objective of the present invention is to provide an adaptive frequency compensation scheme for a LDO regulator, such that the LDO regulator is stable under a wide range of load conditions.
Another objective of the present invention is to provide a LDO regulator with generally improved transient response.
Another objective of the present invention is to provide a LDO regulator with a faster transient response under light-load conditions.
According to one aspect of the present invention, to improve stability, the adaptive frequency compensation scheme generates an equivalent series resistance (ESR). This introduces a zero into the feedback loop. The frequency of the generated zero can be controlled precisely. According to the present invention, it is possible to ensure circuit stability without controlling the lower limit of the equivalent series resistance (ESR) of the output capacitor. This is preferable, because the ESR of a capacitor can vary unpredictably with respect to temperature and load.
According to another aspect of the present invention, for a DC output during transient-state operation, the output ESR should be low, and the cross-over frequency of the LDO regulator should be high. The adaptive frequency compensation scheme of the present invention ensures the stability of the LDO regulator with a generated ESR, rather than the ESR of the output capacitance. There is no need to control lower limit of the ESR of the output capacitance. According to the present invention, the output section can contain an arbitrarily low capacitive ESR without endangering system stability. In practice, this enables the LDO regulator to be optimized for improved transient performance.
According to yet another aspect of the present invention, the adaptive frequency compensation scheme provides for a low-power mode of operation. In low-power mode, pole-zero tracking is enabled. Pole-zero tracking adjusts the position of the zero induced by the generated ESR, so that the zero follows the decrease in the frequency of the output pole. Adjusting the frequency of the zero in this manner maintains the cross-over frequency of the system under light loads. Thus, the transient response of the LDO regulator according to the present invention does not suffer degradation under light loads.
Still further objects and advantages will become apparent from a consideration of the ensuing description and drawings,
REFERENCES:
patent: 6300749 (2001-10-01), Castelli et al.
patent: 6373233 (2002-04-01), Bakker et al.
patent: 6518737 (2003-02-01), Stanescu et al.
patent: 6522112 (2003-02-01), Schmoock et al.
patent: 6600299 (2003-07-01), Xi
patent: 6603292 (2003-08-01), Schouten et al.
patent: 6703816 (2004-03-01), Biagi et al.
patent: 6710583 (2004-03-01), Stanescu et al.
Chen Chern-Lin
Lin Jenn-yu G.
Pan Hsuan-I
Yang Ta-yung
Berhane Adolf
J.C. Patents
System General Corp.
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