Low distortion sample and hold circuit

Details Low distortion sample and hold circuit Low distortion sample and hold circuit

1990-04-13

1991-05-14

Zazworsky, John

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307491, G11C 2702

Patent

active

050158775

ABSTRACT:
A sample and hold circuit having low distortion at a large full power bandwidth utilizes a compensation capacitor which is connected across the input and output of an output stage of the sample and hold circuit and is driven by the output current signal, i.e. slew current I.sub.S, of the input stage. A hold capacitor is also included and arranged in parallel with the compensation capacitor to be voltage driven. The hold capacitor has a capacitance much larger than that of the compensation capacitor and a voltage equal to voltage of the compensation capacitor. A switchable voltage buffer for isolating the hold capacitor from the output of the input stage and for driving the hold capacitor, independently from the slew current, to a voltage value equaling the voltage of the compensation capacitor is also provided.

REFERENCES:
patent: 4211981 (1980-07-01), Lerma
patent: 4404479 (1983-09-01), Toyomaki
patent: 4636744 (1987-01-01), King et al.
"High Temperature Sample and Hold Amplifier"; Harris Corp., HA-2420-1.
"High Speed Precision Monolithic Sample and Hold Amplifier"; Harris Corp., HA-5320.

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