Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Electrical signal parameter measurement system
Reexamination Certificate
2001-11-27
2004-08-10
Hoff, Marc S. (Department: 2857)
Data processing: measuring, calibrating, or testing
Measurement system in a specific environment
Electrical signal parameter measurement system
C702S182000
Reexamination Certificate
active
06775628
ABSTRACT:
CROSS-REFERENCES TO RELATED APPLICATIONS
Not Applicable.
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
Not Applicable.
REFERENCE TO MICROFICHE APPENDIX
Not Applicable
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to automatic test equipment, and, more particularly, to techniques employed by automatic test equipment for sampling and analyzing waveforms.
2. Description of Related Art Including Information Disclosed Under 37 C.F.R. 1.97 and 1.98
Automatic test equipment, or “testers,” are frequently called upon to measure electronic signals in states of change. During the execution of a test program for testing an electronic device, a tester generally first applies power to the device. Then the tester applies an input signal. After a prescribed delay, the tester samples the output of the device in response to the input signal. The tester then compares the samples with expected values to determine whether the test passes or fails.
The prescribed delay between applying the input signal and sampling the output signal ensures that the output signal reaches a stable state before a measurement is made. This delay is often difficult to predict, however. Therefore, test programs conventionally include delay instructions in their software to explicitly wait fixed intervals of time after applying an input signal, before sampling an output signal. To ensure that no device is measured before its output signal is ready, these delay instructions tend to specify exceedingly long intervals, sometimes two or three times as long as the longest observed settling time of the device.
Long delays excessively burden high-volume testing. Customers judge automatic test equipment largely based upon speed of test. Time spent waiting for devices to settle is therefore particularly acute when delays are imposed out of uncertainty, merely to provide a safety margin.
To reduce these delays, test engineers have developed methods for sampling an output of a DUT (device under test) after the tester applies the input signal, and for continually testing whether the output has settled. According to one prior technique, a tester samples the output signal of a DUT and repetitively performs a Discrete Fourier Transform (DFT) on successive groups of samples of the output signal. The tester monitors a characteristic of interest, for example, frequency. Once that characteristic has stabilized, the test program is allowed to resume. The DFT technique therefore adapts the test program's delay to the actual settling time of the device and reduces overall delay.
This technique does not entirely eliminate unnecessary delays, however. DFTs require long computing times. Depending upon the speed of a tester's data processing hardware, as well as the sampling rate and other factors, the tester's DFT throughput may not be able to keep pace with the incoming data stream. Therefore, DFTs may entail unnecessary delays. Moreover, DFTs have relatively poor frequency resolution. The discrete “bins” within which DFTs assign frequencies may be more widely spaced than required. Of course, DFTs' properties can be changed to increase frequency resolution, but this improvement is gained only at the expense of frequency range or processing speed. In addition, DFTs generally require that samples be multiplied by a windowing function, such as a Hamming, Hanning, or Blackman windowing function. As known to those skilled in the art, windowing functions introduce errors, which further degrade the accuracy of the DFT technique.
Another technique has been to sample the output signal of a device and apply linear interpolation to determine the times at which the output signal crosses zero (“zero” in this context refers to average or DC value of the output signal, rather than necessarily to 0 volts DC). The test program identifies samples on opposite sides of zero, and interpolates between the samples to deduce the zero-crossing times. Frequency is then computed as the inverse of the difference between consecutive zero-crossing times of the same slope (i.e., rising to rising, or falling to falling). The zero-crossing method runs much faster than the DFT method—it requires only a few calculations. It also generally has better frequency resolution, because it identifies zero-crossings based upon specific samples that occur at precise, known instants of time. Nevertheless, the zero-crossing method still suffers from inaccuracies, owing to the limited ability of linear interpolation to accurately identify the zero-crossings of inherently non-linear sinusoids.
What is needed is a more accurate, high-speed technique for determining the characteristics of a test signal as a function of time.
BRIEF SUMMARY OF THE INVENTION
With the foregoing background in mind, it is an object of the invention to determine, quickly and accurately, the characteristics of an oscillatory test signal.
To achieve the foregoing object, as well as other objectives and advantages, a technique for determining the characteristics of an oscillatory test signal includes acquiring a plurality of consecutive samples of a test signal. The method includes mathematically fitting a sinusoidal model to the samples. The sinusoidal model specifies a plurality of equations having unknowns that represent characteristics of an ideal sinusoid that substantially intersects the plurality of samples. Solving for the unknowns reveals the test signal's characteristics.
According to one aspect of the invention, a tester applies the technique for determining when a test signal from a device under test has settled. The tester repetitively samples the test signal, applies the model, and solves for at least one of the test signal's characteristics. When, over the course of multiple iterations, the test signal is found to stabilize, the test program can safely advance, without wasting valuable test time.
According to another aspect of the invention, a tester applies the above-described technique for characterizing a transient response of a test signal. According to this variation, a test program induces a change in a device under test, and monitors the test signal over time using the technique. The test program ascertains the output's response to the change by referring to the test signal's characteristics as reported by the technique over time.
According to yet another aspect of the invention, a tester applies the above-described technique for characterizing a frequency-modulated or phase-modulated test signal. The frequency of the test signal can be directly reported, on a cycle-by-cycle basis. Alternatively, the frequency of the test signal can be integrated with respect to time to provide a measure of phase, or phase can be computed directly.
REFERENCES:
patent: 6269317 (2001-07-01), Schachner et al.
patent: 6397146 (2002-05-01), Bruner
patent: 6564160 (2003-05-01), Jungerman et al.
Hoff Marc S.
Raymond Edward
Rubenstein Bruce D.
Teradyne Legal Department
Teradyne, Inc.
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