Amplifiers – With semiconductor amplifying device – Including push-pull amplifier
Reexamination Certificate
2000-11-20
2002-07-16
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including push-pull amplifier
C330S267000, C330S288000
Reexamination Certificate
active
06420933
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to current-to-current impedance converter circuits, and more particularly to a current-to-current converter circuit and method to achieve very low distortion.
2. Description of the Prior Art
Current-to-current impedance converter circuits are intended to output a current from a high impedance node that is equal in magnitude to a current input into a separate low impedance node. The potential at this input node is ideally a circuit common mode voltage. Such impedance converter circuits are problematic in that there is presently no known way to implement such a device without the current path proceeding through collector-emitter junctions of transistors.
Conventional current-to-current converter circuit architectures therefore generate an output current that is distorted by errors due to variation of the finite gain (&bgr;) of the transistors with collector current. In the prior art, these errors are proportional to 1/&bgr;. Because &bgr; is a function of collector current, and hence, input signal level, distortion from these error terms will dominate the overall distortion of the circuit.
In view of the foregoing, a need exists for a technique that mitigates the effects of &bgr; on the foregoing error terms, and thus the error current to provide a current-to-current impedance converter that exhibits very low distortion.
SUMMARY OF THE INVENTION
To meet the above and other objectives, the present invention provides a current-to-current impedance converter that exhibits very low distortion due to ( effects.
According to one embodiment, a current-to-current impedance converter is implemented with a class ‘AB’ output stage such that the driver transistor collector currents are circulated through suitably chosen output current mirrors along with the collector currents of the class ‘AB’ output stage output transistors. The total collector current is folded around by the suitably chosen current mirrors, and the bias currents are subtracted, leaving the output current. The current mirrors can be implemented using any well-known mirror architecture and can be implemented to have any suitable gain so long as the selected gain is common to all the current mirrors. The resulting error current includes a DC offset portion and only a second order in 1/&bgr; portion, thereby providing a significant improvement over conventional current-to-current impedance converters that have a DC offset portion and a first order in 1/&bgr; portion.
According to another embodiment, a current-to-current impedance converter is implemented with a class ‘AB’ output stage such that the driver transistor collectors are connected to the input current summing node of the class ‘AB’ output stage output transistors. The driver collector currents here are also forced to proceed out through suitably chosen identical current mirrors, where error terms that are first order in 1/&bgr; are subtracted and cancelled at an output summing node. The resulting error current again includes a DC offset portion and only a second order in 1/&bgr; portion.
Another embodiment implements a current-to-current impedance converter using a class ‘AB’ output stage such that the driver transistor collectors are connected to their respective source and sink output transistor collectors. The collector currents associated with the source output transistor and its respective driver transistor are folded around a first current path by a first current mirror while the collector currents associated with the sink output transistor and its respective driver transistor are folded around a second current path by a second current mirror. The currents in the first and second current paths are combined at a common output node to generate an output current in which the resulting error current includes a DC offset portion and only a second order in 1/&bgr; portion, thereby providing a significant improvement over conventional current-to-current impedance converters that have a DC offset portion and a first order in 1/&bgr; portion.
In one aspect of the invention, a current-to-current impedance converter is implemented that exhibits very low distortion.
In another aspect of the invention, a current-to-current impedance converter is implemented that accommodates a plurality of applications and processes used to fabricate the converter.
In yet another aspect of the invention, a current-to-current impedance converter can be implemented that selectively minimizes the effects of Miller capacitance at the driver stage.
In still another aspect of the invention, a current-to-current impedance converter can be implemented that selectively minimizes the effects of driver transistor collector-substrate capacitance.
REFERENCES:
patent: 4101734 (1978-07-01), Dao
patent: 4484148 (1984-11-01), Wieser et al.
patent: 5659266 (1997-08-01), Shacter et al.
patent: 5786731 (1998-07-01), Bales
patent: 6313682 (2001-11-01), Muller et al.
Corsi Marco
Gibson Neil
Swanson Leland S.
Holmbo Dwight N.
Kempler William B.
Nguyen Patricia T.
Pascal Robert
Telecky , Jr. Frederick J.
LandOfFree
Low distortion current-to-current converter does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Low distortion current-to-current converter, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low distortion current-to-current converter will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2822385