Low delay decoding

Details Low delay decoding Low delay decoding

1999-05-05

2001-08-28

Chin, Stephen (Department: 2734)

Pulse or digital communications

Receivers

Particular pulse demodulator or detector

Reexamination Certificate

active

06282250

ABSTRACT:

BACKGROUND OF THE INVENTION
I. Field of the Invention
This invention relates to the field of communications systems and, in particular, to transmission of message signals in a communications system.
II. Prior Art
It is well known that it is desirable to reduce the receive and decode delay of frames of data transmitted from a transmitter to a receiver in a communications system. For example, it is desirable to reduce frame delay when information is transmitted through a broadcast channel in a cellular system. Among other things, a reduced delay will allow mobile units to access the cellular system in a faster manner.
Some delay can be tolerated when voice telephones access a cellular system in order to initiate a call. In the case of cell handoff, if the amount of delay is relatively small then it is unnoticeable to the user. However, if the delay becomes too large, it can result in a call being dropped by the system.
High data rate terminals are an example where receive and decode delay is critical. These terminals frequently go on and off line and the access delay can slow applications and result in congestion at the data source. Additionally, in soft handoff even a short delay can produce significant congestion or loss of data.
It is known in the prior art to reduce frame size in order to reduce this delay problem. However, this solution reduces the coding gain or the amount of data that can be transmitted as well as interleaving gain. In order to partially compensate for the loss incurred using this method, the power of the channel can be increased or other methods such as the R-RAKE technique can be used. Additionally increasing the power of the channel will decrease the total capacity of the system. Moreover, the R-RAKE compensation technique requires two or more frames in a row to be the same, and the receiver must be able to know or detect this condition. It can be difficult or troublesome for a system to make this determination.
SUMMARY OF THE INVENTION
The present invention is directed to a method and apparatus for decoding a frame of interleaved information bits in a communications system. The present invention permits decoding of the frame of interleaved information bits before all of the bits in the frame are received at a decoding site. In the present invention, the frame of interleaved information bits has a frame start time and a frame end time. The frame also includes a first fractional segment that has a start time that is the same as the frame start time and an end time that is before the frame end time. Prior to transmission of the frame of interleaved information bits to a decoding site, all bits in the frame are encoded at a code rate R to provide encoded bits, and the encoded bits are positioned in the interleaved frame in accordance with an interleaving pattern that stores bits having a code rate R
1
within the first fractional segment of the interleaved frame. In a preferred embodiment, R
1
=R/a
1
, and a
1
corresponds to the duration of the first fractional segment of the frame. At the decoding site, interleaved information bits from the first fractional segment of the frame are initially received, and an attempt is made to decode the frame using information bits from only the first fractional segment of the frame. If this initial decoding attempt is unsuccessful, the system attempts to decode the frame again using information bits from both the first fractional segment of the frame and further information bits located between the end time of the first fractional segment and the frame end time.
In accordance with a further aspect, the interleaving pattern described above also optionally stores bits having a code rate R
2
at a second fractional segment of the interleaved frame, wherein the starting time of the interleaved frame and starting time of the second fractional segment coincide with each other, and the second fractional segment has an ending time that is after an ending time of the first fractional segment. The interleaving pattern also optionally stores bits having a code rate R
3
at a third fractional segment of the interleaved frame, wherein the starting time of the interleaved frame and starting time of the third fractional segment coincide with each other, and the third fractional segment has an ending time that is after an ending time of the second fractional segment. In a preferred embodiment, a
2
corresponds to a length of the second fractional segment of the frame, a
3
corresponds to a length of the third fractional segment of the frame, and the interleaving pattern used is chosen such that R
2
=R/a
2
and R
3
=R/a
3
. Additionally, the bits in the first fractional segment are included in the second fractional segment; and the bits in the first and second fractional segments are included in the third fractional segment.
In accordance with a still further aspect, when the interleaved frame is formed as described in the paragraph above, if the initial decoding attempt (using only the first fractional segment) is unsuccessful, the system attempts to decode the frame a second time using information bits from only the second fractional segment of the frame. If this second decoding attempt fails, the system then attempts to decode the frame a third time using information bits from only the third fractional segment of the frame. Finally, if this third decoding attempt fails, the system attempts to decode the frame again using all information bits from the frame. In accordance with a particularly preferred aspect, the first, second and third decoding attempts described above may be performed before all of the frame has been received by the receiver at the decoding site.
Many values of a
1
, a
2
and a
3
may be used for implementing the present invention. In one embodiment described below, a
1
, a
2
and a
3
correspond to the values ¼, ½, and ¾, respectively. It will be understood by those skilled in the art that other values for these parameters may alternatively be used for implementing the invention.


REFERENCES:
patent: 5835509 (1998-11-01), Sako et al.
patent: 5883923 (1998-11-01), Shimazaki
patent: 6038253 (2000-03-01), Shimazaki
patent: 6094465 (2000-07-01), Stein et al.
patent: 6177930 (1998-11-01), Chernock et al.

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