Stock material or miscellaneous articles – Composite – Of inorganic material
Reexamination Certificate
1998-04-24
2001-01-30
Turner, Archene (Department: 1775)
Stock material or miscellaneous articles
Composite
Of inorganic material
C428S212000, C427S372200
Reexamination Certificate
active
06180270
ABSTRACT:
FIELD OF THE INVENTION
This invention pertains to the treatment of Gallium Nitride used in semiconductor fabrication.
BACKGROUND OF THE INVENTION
Gallium Nitride (GaN) is a semiconductor material which has lately been the subject of much attention by workers in the semiconductor arts. A key feature of this semiconductor material is the high bandgap (3.4 eV) which leads to two other desirable properties.
First the optoelectronic activity of this material is in the blue region of the spectrum. This is desirable to complement already existing optoelectronic materials which have optoelectronic activity in the red and green spectral regions in order to obtain a set of color sources or detectors which can nearly span the range of perceptible colors. Optoelectronic activity in the blue region is desirable, of its own right, because optical systems based on the smaller wavelength blue spectral region would have higher resolution capability. For example a GaN based semiconductor laser could be used in an optical disk system to achieve greatly increased data density.
Second the high band gap, allows for high temperature operation with out swamping the conduction band with thermally generated carriers. High temperature operation may arise in high power applications and medium power applications where the thermal management of the electronics is constrained by mechanical design constraints e.g. servo drive electronics located in a confined space.
Currently GaN semiconductors (e.g. devices) are not prepared from bulk GaN wafers or the like, as is silicon. Such bulk electronic quality GaN is not widely available. Rather GaN epitaxial layers (epilayers) are deposited by chemical vapor deposition (CVD) or metal-organic chemical vapor deposition (MOCVD) on a substrate of another material. Even if GaN wafers were available epitaxial layer deposition has other advantages which might recommend its use. It may be desirable to deposit a number of different semiconductor layers sequentially on a different material substrate in making a so called heterostructure device, or in making microwave integrated circuits it may be desirable to deposit the semiconductor material on a dielectric substrate, or it may be desirable for thermal management to use a thermally stable high thermal conductivity substrate rather than using bulk GaN.
A major problem which arises in conjunction with epitaxial GaN is the lack of a suitable inexpensive substrate which has a good lattice constant match to GaN. A good lattice match exists when the dimensions of the crystal lattice unit cell (in the directions parallel the interface surface) of the substrate and the crystalline material to be deposited (e.g. GaN) correspond (e.g. are equal). Silicon carbide and GaN match better (3% difference), however sufficient quality silicon carbide substrates are very expensive.
The epitaxial growth process can be divided into three stages. Initially isolated islands of the epitaxial material form, next the islands coalesce, and then bulk film growth takes place as more material accumulates on the surface.
When there is a poor lattice match, the epitaxial layer that is grown will have a high concentration of defects. These defects arise because different isolated portions of the initially deposited GaN (e.g. the islands) are aligned locally to the sapphire substrate crystal lattice. However because of the substrate-epitaxial layer lattice mismatch, the alignment of the many isolated portions are not consistent with each other, and they can not form a unified crystal and at the same time maintain their local alignment/adhesion to the sapphire. That is, translation symmetry operations corresponding to the GaN crystal does not describe the location and orientation of the isolated islands because they are aligned to the substrate which has a lattice mismatch vis-a-vis the GaN.
In practice, the defect concentration is highest near the substrate interface, and decreases toward the top of the epitaxial layer. The electronic devices (e.g. vertical (planar) bipolar junction transistors, field effect transistors, light emitting diodes, lasers) which are to be fabricated out of the GaN are fabricated in or on the top of GaN layer which may be appropriately doped to make n or p type semiconductor as is known in the art. The device region may extend into the epitaxial layer to a certain depth, e.g. 0.1&mgr;. It is important that the top portion of the epitaxial layer which contains the device structures to be as defect free as possible because the defects can adversely affect manufacturing yield, device performance, and device lifetime. Crystal defects can allow metalization spiking into the device and even punch through device junctions leading to a non working device (reduced manufacturing yield) or a premature device failure. Defects can act as pathways for enhanced undesirable thermal migration of dopants, by which dopants migrate, leading to inaccurate doping profiles and poor device performance or device failure. The latter two problems would be aggravated in high power and perforce high temperature applications. Defects can also act as recombination-generation (R-G) centers which adversely affect carrier lifetimes and thereby device performance. In sum, reducing defect density in the upper (device) strata of epitaxial layers is desirable for electronic device fabrication.
Sapphire (hexagonal Al
2
O
3
) is a readily available, high quality, inexpensive substrate material that offers good thermal stability and thermal conductivity. Unfortunately there is a large lattice mismatch (14%) between GaN and sapphire.
Referring to
FIG. 3
a dark field transmission electron micrograph TEM photo is shown. This photo depicts a GaN epitaxial layer grown on a sapphire substrate which is below the border of the image (not shown). Also depicted is a tungsten silicide (WSi) metallization layer on top of the GaN epilayer. In this photo the thin vertically oriented white lines extending from the WSi layer into GaN is metal spiking of the WSi into the GaN which has been facilitated by the high defect density in the GaN layer. This extent of spiking is unacceptable for semiconductor device fabrication.
One prior art method used to reduce the defect density of GaN grown on sapphire stemming from the lattice mismatch is to first deposit a more amorphous (non crystalline) layer of GaN on the sapphire substrate. This thin layer is crystallized by a ramped thermal process, then an in situ doped GaN epilayer is grown. This epilayer has a high defect density. The present invention is intended to reduce the defect density beyond what is achieved with the forgoing technique.
SUMMARY OF THE INVENTION
According to the present invention a process comprising a thermal treatment step is used to obtain a lower defect density in at least a portion of an epitaxial layer GaN deposited on a substrate which has a lattice mismatch with respect to GaN.
According to a further aspect of the invention a post growth, rapid thermal processing (RTP) treatment step is used to obtain a lower defect density in at least a portion of an epitaxial layer GaN deposited on a substrate which has a lattice mismatch with respect to GaN.
According to a still further aspect of the invention a lattice mismatched substrate bearing a layer of GaN is subjected to heating to a temperature of at least 600 C., preferably at least about 700, for a time sufficient to obtain a substantial reduction in defect density.
Although not wishing to be bound by any theory, applicant would like to make note of certain general principles which will guide the worker in the art in varying the time and temperature (time-temperature (t-T) profile) of the treatment. In general the time temperature profile is the graph of the temperature to which the sample is subjected as a function of time during the processing. The annealing out of growth related defects in GaN occurs by mechanisms which are not at present understood in detail, yet are expected follow certain rate laws given by one or more Arrehnious equations including, at prese
Cole Melanie
Xie Kezhou
Clohan, Jr. Paul S.
Eshelman William E.
Kelly Mark
The United States of America as represented by the Secretary of
Turner Archene
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