Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate
2008-06-18
2010-11-30
Le, Thong Q (Department: 2827)
Static information storage and retrieval
Addressing
Plural blocks or banks
C365S230010, C365S230060, C365S230080
Reexamination Certificate
active
07843756
ABSTRACT:
A low-current consumption semiconductor memory device includes a plurality of cell blocks, in which each cell block includes a plurality of cell mats; a plurality of input/output line switches which transmit the plurality of cell blocks to input/output lines; and an input/output line control circuit which receives a block address indicating arbitrary blocks among the plurality of cell blocks and an active command to control a drive of an input/output line switch according to an input level of the block address.
REFERENCES:
patent: 5091883 (1992-02-01), Matsuzaki et al.
patent: 7286416 (2007-10-01), Ooishi et al.
patent: 2002/0181315 (2002-12-01), Lee et al.
patent: 2003/0002316 (2003-01-01), Morita et al.
patent: 2007/0180006 (2007-08-01), Gyoten et al.
patent: 1020050034383 (2005-04-01), None
patent: 1020080062097 (2008-07-01), None
Hynix / Semiconductor Inc.
Ladas & Parry
Le Thong Q
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