Low cost, thermally efficient, and surface mountable semiconduct

Details Low cost, thermally efficient, and surface mountable semiconduct Low cost, thermally efficient, and surface mountable semiconduct

1993-06-17

1994-11-22

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Insulating material

257706, 257720, 361707, 361709, 361714, H01L 2302

Patent

active

053671937

ABSTRACT:
A substrate, a heat slug with an access cavity, a lid, and a heat sink having a stem are used to package a high applied power VLSI die. The substrate comprises a stepped housing cavity at its center, and a number of electrical contacts disposed at its underside. The inactive side of the high applied power VLSI die, the top surface and underside openings of the stepped housing cavity of the substrate, the heat slug including its access cavity, the stem of the heat sink, and the lid are coordinated in their sizes and geometric locations in view of the applied power and the heat transfer efficiency of the heat sink. As a result, sufficient heat is directly transferred away from the high applied power VLSI die through only one layer of thermal adhesive material, thereby keeping the temperature in the stepped housing cavity of the substrate from rising above an unacceptable threshold, and yet the semiconductor package can still be assembled using industry standard unmodified wire bonding and surface mount equipment.

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patent: 4626960 (1986-12-01), Hamano et al.
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patent: 5012386 (1991-04-01), McShane et al.
patent: 5065281 (1991-11-01), Hernandez et al.
patent: 5191511 (1993-03-01), Sawaya
patent: 5227663 (1993-07-01), Patil et al.

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