Radiation imagery chemistry: process – composition – or product th – Including control feature responsive to a test or measurement
Reexamination Certificate
1998-02-03
2001-01-09
Young, Christopher G. (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Including control feature responsive to a test or measurement
C382S145000, C382S149000, C382S151000
Reexamination Certificate
active
06171737
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to techniques for detecting and reducing defects formed on a wafer during submicron lithography.
2. Description of Related Art
Manufacturing processes for submicron integrated circuits require strict process control for minimizing defects on integrated circuits. Defects are the primary “killers” of devices formed during manufacturing, resulting in yield loss. Hence, defect densities are monitored on a wafer to determine whether a production yield is maintained at an acceptable level, or whether an increase in the defect density creates an unacceptable yield performance. Hence, the detection and monitoring of defects is critical to maintaining an acceptable yield.
Conventional approaches monitor defects by performing an electrical testing of completed products following the fabrication steps (i.e., semiconductor devices), and by monitoring for defects on product wafers using defect inspection tools at various steps of the testing process. However, defect detection is difficult for multilayer devices, since defects may be present within any one of at least five or six layers for the most simple integrated circuit. If a defect passes through more than one layer, a defect inspection tool may erroneously detect a defect on a given layer that was already present from a previous layer. As such, it may be difficult to identify which layer has a certain problem generating the defect. Hence, the monitoring of defects on a product wafer may overwhelm the ability to distinguish whether a defect on a certain layer is caused during the fabrication of a corresponding layer, or caused by an embedded defect formed from a previous layer.
Although certain yield management systems permit in-line monitoring to monitor process defects at certain processing stages, such in-line monitoring systems may still erroneously detect a defect on a given layer that was already present from a previous layer. Moreover, additional testing cannot be performed to identify and classify defects without removing the wafer from production, increasing the production delay and cost.
The testing costs may be even higher since the in-line monitoring techniques require the silicon wafer to be scrapped after analysis. Specifically, in-line defect analysis requires a clean wafer having a substantially low defect density of approximately 0-5 particles (0.2 microns or larger) per wafer. Hence, a silicon wafer used for in-line defect monitoring cannot be reused because the defect density of the used silicon wafer after any attempted cleaning is unacceptably high.
In addition, cleaning a monitored wafer for attempted reuse must not change its optical properties such as reflectivity, otherwise the testing machine may obtain a substantially different image of the wafer, resulting in a failure. Hence, the changes in the optical properties of the cleaned monitor wafer would cause additional delays due to recalibration of the in-line testing equipment to accommodate the changes in reflectivity.
DISCLOSURE OF THE INVENTION
There is a need for a low cost arrangement for monitoring defects generated from a photolithography process in the fabrication of integrated circuits.
There is also a need for improving product sort yield and lowering manufacturing costs without unnecessarily scrapping silicon wafers used for the production of integrated circuits.
There is also a need for an arrangement for identifying defects and their associated causes in a low cost arrangement that accurately models fabrication processes.
There is also a need for a low cost arrangement for monitoring defects using reusable test wafers, where the test wafers have a low defect density following cleaning that enables reuse of the test wafers without recalibration of the testing equipment.
There is also a need for an alternative substrate for defect monitoring that can provide a low defect density following cleaning and that can be reusable a multiple number of times for defect monitoring.
There is also a need for an arrangement for cleaning a test wafer for reuse in detecting defects encountered during photolithography, where the cleaned test wafer has a sufficiently low particle count and stable optical characteristics acceptable for in-line testing without recalibration of test equipment such as inspection metrology tools.
These and other needs are attained by the present invention, where defects are monitored using a reusable test wafer, where formation of a pattern on the reusable test wafer enables image-based defect analysis to be performed for pattern-forming processes, such as photolithography. The test wafer is then cleaned using a process that provides a cleaned test wafer having a sufficiently low particle count for reuse for subsequent pattern-forming processes and image-based defect analysis. The cleaned test wafer also can retain its optical characteristics to enable reuse on inspection metrology tools without recalibration. As such, the process for cleaning a test wafer enables reuse of the test wafer for several cycles.
According to one aspect of the invention, a method of monitoring defects generated during formation of a pattern on a wafer comprises forming a test wafer having an oxide layer overlying on a silicon substrate of the wafer, forming a pattern on the oxide layer according to a prescribed fabrication process, the pattern related to a prescribed design product rule, inspecting the pattern to detect a defect, classifying the defect to a defect type and defect cause, and determining whether the pattern has a defect density below a prescribed threshold acceptable for wafer fabrication. Formation of the test wafer having an oxide layer overlying on the silicon substrate provides a low-cost technique in monitoring defects, since the test wafer can be reused by removing the pattern from the oxide layer following defect analysis for the pattern formed on the test wafer. In addition, the test wafer having the oxide layer has the advantages over other film substrates of providing a very low particle count after cleaning, and providing a low oxide loss that causes no impact on defect metrology tools, such as the pattern comparator.
In addition, forming the pattern on the oxide layer according to prescribed fabrication process enables detection and analysis of defects specific to the formation of the pattern according to the prescribed fabrication process. Hence, detected defects can be isolated and identified as having been caused by the corresponding fabrication process forming the pattern. Hence, the inspection and classification of defects associated with formation of the repetitive pattern enables specific defect types and causes to be classified, enabling corrective action to be implemented in the fabrication processes. If desired, a repetitive pattern may be used that maximizes the sensitivity of the defect metrology tools (e.g., the pattern comparator).
Another aspect of the present invention provides a system for monitoring defects on a wafer during photolithography processing, comprising a test wafer generation system for generating a test wafer having an oxide layer formed on a silicon substrate, the test wafer having a prescribed thickness that minimizes reflectance during the photolithography processing, a photolithography system forming a pattern on the test wafer using the photolithography processing, the pattern related to a prescribed design product rule, a wafer inspection system for detecting defects on the patterns based on pixel-based comparisons between adjacent patterns on the test wafer, and a defect review system for classifying the detected defects by respective types and causes, the defect review system generating a prioritized list of the defect causes. Generation of a test wafer by the test wafer generation system enables low-cost defect monitoring to be performed for the photolithography processing, since the pattern on the test wafer can be removed from the test wafer following testing in a manner that results in a sufficiently low particle c
Chiu Robert J.
Phan Khoi A.
Punjabi Shobhana R.
Singh Bhanwar
Advanced Micro Devices , Inc.
Young Christopher G.
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