Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2000-06-19
2002-07-09
Paladini, Albert W. (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S260000, C174S262000, C257S778000
Reexamination Certificate
active
06417462
ABSTRACT:
FIELD OF THE INVENTION
This invention is related to integrated circuit (IC) packaging and multi-layer printed wiring boards for a bus architecture featuring several high density IC packages.
BACKGROUND
Multi-layer boards serve to implement the wiring in complex digital electronic systems and physically support the IC packages in the systems. In modern systems which have wide parallel buses (for instance those having 32 bits and higher address and/or data) and three (3) or more loads which share some of the address, data, and control lines of the bus, the board becomes a significant part of the total cost of the system. For instance, in a conventional 3-load system that features two processors and a bridge chip set with more than 400 pins per IC package, a 12 to 16 layer printed wiring board may be needed to implement the bus interconnect. In addition to an excessive number of layers, the conventional 3-load system also suffers from poor electrical performance, especially at bus speeds in excess of several hundred mega transactions per second (MT/s), because of long stubs (a section of interconnect branching away from the main bus) required to connect all the chips sharing a line of the main bus.
REFERENCES:
patent: 5502621 (1996-03-01), Schumacher et al.
patent: 5832294 (1998-11-01), Reinschmidt
patent: 6002178 (1999-12-01), Lin
patent: 6071754 (2000-06-01), Wark
patent: 6226246 (2001-07-01), Crane et al.
“Dynamic Termination Output Driver for a 600MHz Microprocessor”, Sai Vishwanthaiah et al. ISSCC 2000/Session 15/High-Speed I/O/Paper TP 15.1, Digest of Technical Papers, Feb. 8, 2000 @ pp. 248-249.
U.S. Patent Application Ser. No. 09/001,550 of Dabral, et al.
Dabral Sanjay
Zeng Ming
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Paladini Albert W.
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