Low consumption analog multiplier

Miscellaneous active electrical nonlinear devices – circuits – and – Specific input to output function – Combining of plural signals

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327362, 327563, 330257, 330261, G06F 744

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active

057149038

ABSTRACT:
An analog multiplier includes at least a differential output stage formed by a pair of emitter-coupled bipolar transistors. Each transistor of the pair of emitter-coupled bipolar transistors is driven by a predistortion stage having a reciprocal of a hyperbolic tangent transfer function that is attributable to the base currents of the bipolar transistors used in the predistortion stage. The error in the output signal produced by the analog multiplier is compensated by generating replicas of the base currents of the bipolar transistors of the differential output stage and forcing those replica currents on the output node of a respective predistortion stage. Various embodiments that consume different amounts of power are described.

REFERENCES:
patent: 3793480 (1974-02-01), Waehner
patent: 4156283 (1979-05-01), Gilbert
patent: 4563670 (1986-01-01), Stallkamp et al.
patent: 5030924 (1991-07-01), Fritz
IEEE Journal of Solid-State Circuits, vol. sc-19, No. 6, Dec. 1974 New York, US, pp. 364-373, Berrie Gilbert. "A High-Performance Monolithic Multiplier Using Active Feedback".
Gray, et al., "Analysis and Design Of Analog Interated Circuits", 1984, John Wiley & Sons, New York, US pp. 590-600.

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