Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Patent
1996-12-03
1999-07-13
Crane, Sara
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
257506, 257758, 257760, H01L 2900
Patent
active
059230746
ABSTRACT:
A low capacitance interconnect structure and process is provided for integrating low-k decomposed polymers into integrated circuit structures and processes, especially those requiring multiple levels of interconnect lines, for reduced capacitance over prior art structures. Embodiments of the present invention use polymers which typically decompose into gases with lower dielectric coefficients than the original polymer to provide a lower dielectric constant material between conductive interconnects on an integrated circuit. The materials are decomposed after being sealed in with a cap layer to prevent contamination of the gas filled void left after decomposition. The present invention also combines the advantages of SiO.sub.2 with low dielectric decomposed polymers by placing the low decomposed material only between tightly spaced lines. The low-k polymer material can be applied by spin-on techniques or by vapor deposition.
REFERENCES:
patent: 4336320 (1982-06-01), Cummings et al.
patent: 4750070 (1988-06-01), Maruyama
patent: 5489551 (1996-02-01), Castleberry
patent: 5602060 (1997-02-01), Kobayashi et al.
patent: 5693566 (1997-12-01), Cheung
Crane Sara
Donaldson Richard L.
Kempler William B.
Petersen Bret J.
Texas Instruments Incorporated
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