Low capacitance bus driver

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Patent

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Details

326 58, 326113, 326121, H03K 19084

Patent

active

056821107

ABSTRACT:
A low capacitance bus driver circuit includes, in this example, P-channel and N-channel output transistors with input gates connected by means of CMOS pass gates to a common input terminal and having respective P-channel and N-channel transistors connected to the input gates of the output transistors so as to place them in a high impedance state when the CMOS pass gates are disabled. Input capacitance of the bus driver circuit is greatly reduced by elimination of CMOS gate capacitance when the bus driver is enabled. When the bus driver is not enabled, it provides optimal performance of a single gate delay from input to output without the need for series connected output devices or correspondingly higher input capacitance.

REFERENCES:
patent: 4366556 (1982-12-01), Kyomasu et al.
patent: 4595845 (1986-06-01), Briggs
patent: 5126596 (1992-06-01), Millman
patent: 5153459 (1992-10-01), Park et al.
patent: 5173627 (1992-12-01), Lien

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