Low capacitance bipolar junction transistor and fabrication proc

Details Low capacitance bipolar junction transistor and fabrication proc Low capacitance bipolar junction transistor and fabrication proc

1990-12-07

1992-05-26

Carroll, J.

357 4, 357 54, 357 56, 357 59, H01L 2972, H01L 2934, H01L 2904, H01L 2712

Patent

active

051172712

ABSTRACT:
This invention relates to a bipolar transistor which incorporates, in a raised base regime, an emitter, collector pedestal and intrinsic and extrinsic bases all of which are self-aligned. The invention also relates to a process for fabricating such devices which obtains the self-alignment of the above mentioned elements using a single lithographic and masking step. The structure of the transistor, in addition to having the self-aligned elements, incorporates a composite dielectric isolation layer which not only permits the carrying out of a number of functions during device fabrication but also provides for desired electrical characteristics during device operation. The composite isolation layer consists of an oxide layer adjacent the semiconductor surface; a nitride layer on the oxide layer and an oxide layer on the nitride layer in the final structure of the device. The last mentioned oxide layer starts out early in the fabrication process as a layer of oxidizable material, preferable polycrystalline silicon, which, at later steps in the process, acts as an etch-stop in its unoxidized state and as a memory element and mask in its oxidized state when a self-aligned datum element is removed and the thus exposed underlying dielectric elements must be removed to provide a planar emitter opening. The resulting transistor includes a planar emitter-emitter contact interface which provides for fine control of emitter depth in the underlying intrinsic base region.

REFERENCES:
patent: 4499657 (1985-02-01), Ooga et al.
patent: 4504332 (1985-03-01), Shinada
patent: 4692786 (1987-09-01), Lindenfelser
patent: 4852362 (1989-07-01), Suzuki
patent: 4860078 (1989-08-01), Vaes
patent: 4958201 (1990-09-01), Mimura

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