Low-bandgap double-heterostructure InAsP/GaInAs photovoltaic...

Batteries: thermoelectric and photoelectric – Photoelectric – Cells

Reexamination Certificate

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C136S244000, C136S249000, C136S256000, C136S252000, C136S253000, C136S262000, C257S431000, C257S443000, C257S461000, C257S463000, C257S466000, C257S184000, C257S191000, C257S185000, C257S190000

Reexamination Certificate

active

06300557

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the field of photovoltaic (“PV”) direct energy conversion. In particular, the present invention relates to low-bandgap InAsP/GaInAs/InAsP double-heterostructure (“DH”) converters.
2. Description of the Related Art
PV converters are used in a wide variety of applications. Low-bandgap thermophotovoltaic (“TPV”) energy systems convert thermal energy to electric power using the same principle of operation as solar cells. In particular, a heat source radiatively emits photons that are incident on a semiconductor TPV cell. Photons with an energy greater than the bandgap (E
g
) of the semiconductor cell excite electrons from the valence band to the conduction band (interband transition). The resultant electron hole pairs (ehp) are then collected by the cell junction. A photo-current/voltage is then available on external metal contacts that can power an electrical load. In the prior art, the object has been to continue in making improvements in the efficiency of these devices.
One way to maximize efficiency, power/density, or both of these in PV devices is to match the bandgap of the semiconductor to the radiator temperature. For a given radiator temperature, increasing the bandgap will generally increase device efficiency, while decreasing the bandgap will generally increase power density.
Currently, bandgap variation is achieved by growing ternary (three-component) and quaternary (four-component) epitaxial III-V semiconductor layers on binary (two-component) substrates. III-V semiconductors are formed from elements from groups III and V of the Periodic Table. Ternary semiconductors vary both the bandgap and lattice constant as the composition changes between the binary endpoints. For example, the room temperature InGaAs bandgap (Energy Gap) and lattice constant (a
0
) can be varied between those for InAs and GaAs. Only a limited number of ternary semiconductors can be grown lattice matched to available binary substrates, and these particular ternary semiconductors have only discrete energy bandgaps. Examples of the designs include the solar cells based on the lattice-matched combinations Ga
0.52
In
0.48
P/GaAs, As
x
Ga
1−x
As/GaAs, and InP/Ga
0.47
In
0.53
As. At 300° K Ga
0.47
In
0.53
As is lattice-matched to InP and has a bandgap of 0.74 eV. A lattice-matched constraint, which is desired for the highest performance devices, severely limits the number of material options available for ternary epitaxial layers grown on binary substrates.
A low-bandgap, double-heterostructure (“DEH”) converter design has also been used to produce high-efficiency PV converters using III-V semiconductors. Low-bandgap DH converters are based on the use of high-bandgap ternary layers applied to the front and back surfaces of a low-bandgap, ternary p
-junction absorber, such as GaInAs. In the prior art, non-DH devices exhibit high minority-carrier surface recombination velocities, which are undesirable because recombination is known to lower the quantum efficiency and increase the reverse-saturation current density of the devices. Thus, high recombination velocities are constraints which have become problematic in the development of III-V PV converter devices. A need therefore exists for higher-efficiency III-V DH PV converters, of a substantially different design, wherein the high-bandgap ternary layers applied to the front and back surfaces of a low-bandgap ternary p
-junction absorber component layers are used as passivation and confinement layers in order to efficiently suppress minority carrier recombination in the cells.
The voltage produced across the electrodes of a single TPV cell, however, is insufficient for certain solar applications. To achieve a useful power level from TPV devices, individual photovoltaic cells must be electrically connected in a series/parallel arrangement, which is referred to herein as a photovolatic “module.” These modules can be created in a monolithic configuration on a single substrate and, as such, are referred to herein as monolithically interconnected modules (“MIM”). MIMs provide a number of advantages which are useful in the application of TPV systems, including a reduction in joule losses, flexibility in device design and electrical output characteristics, and simplified thermal management and long-wavelength photon recuperation. This later advantage is primarily due to the ease in application of metallic back-surface reflectors (“BSR”) to the substrates.
Thin-film MIMs are typically manufactured by a deposition and patterning method. One example of a suitable technique for depositing a semiconductor material on a substrate is glow discharge in silane, as described, for example, in U.S. Pat, No. 4,064,521. Electrical isolation of the component photocells is typically accomplished with a groove, trench, or step formed through the semiconductor layers and terminating at the substrate. Several patterning techniques are conventionally known for forming the grooves separating adjacent photovoltaic cells, including silkscreening with resist masks, etching with positive of negative photoresists, mechanical scribing, electrical discharge scribing, and laser scribing. One objective forming the grooves is to make them as narrow and shallow as possible because deep grooves add to manufacturing costs and narrow grooves retain a larger percentage of the photocell cell surface area, which is actively engaged in producing electricity. Moreover, electrical isolation of the photovoltaic cells using grooves which terminate, through the semiconductor layers, at the substrate precludes the use of certain binary substrates, such as GaSb, which are difficult to render semi-insulating. Therefore, what is needed is a high-performance, low-band gap MIM which includes an integral cell isolation diode, which is useful for electrically isolating the photocell components.
SUMMARY OF THE INVENTION
It is therefore an object if the invention to improve the efficiency of III-V PV converters by providing a structure wherein the ternary layers applied to the front and back surfaces of the absorber a p
-junction operate as passivation and confinement layers, which are useful to efficiently suppress minority carrier recombination.
It is a further object of the invention to provide low-bandgap (0.5-0.6 eV) III-V DH PV converters which are capable of lattice-mismatched growth on a binary crystal substrate.
It is yet another object of the invention to provide high-performance TPV discrete converters having a low-bandgap, which are grown lattice-mismatched on a binary substrate, such as InP, for use as component cells in monolithically interconnected modules having integral cell isolation diodes.
Additional advantages of the present invention will be set forth in part in the description that follows and in part will be obvious for that description or can be learned from practice of the invention. The advantages of the invention can be realized and obtained by the invention particularly pointed out in the appended claims.
To overcome the problems of the related art devices and in accordance with the purpose of the invention, as embodied and broadly described herein, a low-bandgap double-heterostructure PV device is provided, including in optical alignment a first InP
1−y
As
y
n-layer formed with an n-type dopant, an Ga
x
In
1−x
As absorber layer, the absorber layer having an n-region formed with an n-type dopant and an p-region formed with a p-type dopant to form a single pn-junction, and a second InP
1−y
As
y
p-layer formed with a p-type dopant, wherein the first and second layers are used for passivation and minority carrier confinement of the absorber layers.


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patent: 4633030 (1986-12-01), Cook
patent: 4846896 (1989-07-01), Hokuyo
patent: 5266125 (1993-11-01), Rand et al.
patent: 5322572 (1994-06-01), Wanlass
patent: 5389158 (1995-02-01), Fraas et al.
patent: 5471076 (1995-11-01), Murakami et al.
patent: 54

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