Loss of ground protection for electronic relays

Details Loss of ground protection for electronic relays Loss of ground protection for electronic relays

1998-12-18

2001-06-12

Sherry, Michael J. (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Ground fault protection

C361S086000

Reexamination Certificate

active

06246557

ABSTRACT:

BACKGROUND AND SUMMARY OF THE INVENTION
The present invention relates to electronic relays and high-side drivers.
BACKGROUND
Electronic Relays
Relays are in widespread use in industry. In particular, electronic relays are gaining popularity over mechanical relays in many areas where advances in technology by way of processes and packaging provide for their application.
Electronic relays may comprise, for example, an integrated driver control circuit which controls a separate power output driver (transistor or other solid-state device) which can switch loads demanding high power. Both the driver control circuit and the output driver may comprise active devices which are sensitive to voltage fluctuations. These unwanted fluctuations may cause the device to turn on at the moment it is intended to be off. Thus good grounding practices are an essential factor in reducing the possibility of device turn-on as a result of voltage fluctuations.
A particular concern with electronic relays in the automotive industry is that the ground voltage of the load (e.g. a battery or alternator) may be different than the ground voltage of the electronic relay. This is a problem particularly in automotive environments, where dirty connections can cause a shift in contact resistance, and high currents are common. As a result, present electronic relay designs may behave erratically if the ground potentials are sufficiently different. For example, if the relay ground rises sufficiently above the load ground, active device threshold voltages may be exceeded, resulting in the device turning on when it should not be on.
Automotive applications also offer an operating environment which can be harsh due to vibrations and wide temperature excursions. As a result, relay connections may be the source of numerous problems due to thermal creep, vibration, or even inadvertent error by a person performing maintenance on the system where the connection is not replaced. Furthermore, in some systems, the connection may not be designed in such a way to prevent it from being reinserted the wrong way. Consequently, a person may incorrectly reconnect a cable where, for example, the ground terminal is connected to a potential other than ground. Again, the potential for active device turn-on exists when the possibility of relay ground sufficiently exceeds the load ground potential.
Prior-Art Protection Circuit
FIG. 2
illustrates a prior-art electronic relay loss-of-ground protection circuit. The minimum gate potential that the drive circuit
202
of electronic relay
200
can provide for the output driver (e.g. a power N-CH DMOS) Q
3
is the voltage of the driver control circuit ground reference GND
R
(also relay ground). If the ground potential of the load GND
L
has a lower voltage potential than the driver control circuit ground reference GND
R
, then the minimum gate-to-source voltage of the output driver Q
3
cannot be less than the voltage difference between the references, GND
L
and GND
R
. If this voltage difference is greater than the threshold voltage of the output driver Q
3
, then the output driver Q
3
cannot be switched off.
In a worst case condition where relay ground GND
R
is lost, or inadvertently connected to the battery voltage V
BAT
, the full battery voltage is applied between the gate and source of the output power transistor Q
3
.
Sample Protection Circuit
FIG. 3
shows an improvement to the prior-art circuit of
FIG. 2
, using an additional discrete transistor Q
1
(located outside the dotted-line boundary of the integrated circuit) to provide loss-of-ground protection. In this scenario, when the relay ground potential GND
R
is substantially greater than the load ground potential GND
L
, transistor Q
1
inhibits the output driver Q
3
from turning on. The transistor Q
1
(e.g. a bipolar NPN in this embodiment), biased by resistor R
1
to turn on during a rise in voltage at relay ground GND
R
, conducts because of a positive base-emitter voltage (V
be
), and effectively shorts out the gate-source nodes of the output driver Q
3
. Consequently, the output driver Q
3
is turned off.
Resistors R
2
and R
3
limit the currents through respective parasitic well diodes D
2
and D
1
of the driver control circuit
302
. A major disadvantage of this solution is that the additional discrete transistor Q
1
cannot be integrated onto the same chip as the output driver Q
3
without introducing undesirable process side-effects. For example, integration of the transistor Q
1
automatically generates a parasitic well diode from the relay ground node GND
R
to the collector of the transistor Q
1
. Therefore, the undesirable constraints of FIG.
2
are reintroduced where the gate voltage of the output driver Q
3
cannot be less than one V
be
drop with respect to relay ground GND
R
.
Innovative Structures and Methods
The present application discloses a loss-of-ground protection circuit for an electronic relay comprising a control circuit driving a power transistor, and at least one cutoff transistor having a grounded control terminal. The cutoff transistor is interposed between the control circuit and a control terminal of the power transistor, and has a polarity such that loss of ground will cause the cutoff transistor to turn off.
The innovative circuit advantageously provides loss-of-ground protection for electronic relays, and prevents the power DMOS output transistor from switching on improperly when ground is lost.


REFERENCES:
patent: 4808839 (1989-02-01), Dunn et al.
patent: 4949142 (1990-08-01), Contiero et al.
patent: 5166852 (1992-11-01), Sano
patent: 5305176 (1990-08-01), Hirota
patent: 5418673 (1995-05-01), Wong
patent: A1 0 337 857 (1989-04-01), None
Robert Liou, “Es werde Licht”, Jun. 2, 1996, Design & Elektronik 3, pp. 8,10.

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