Patent
1997-06-04
1999-04-20
Butler, Dennis M.
395553, 3951821, G06F 1100
Patent
active
058965238
ABSTRACT:
Synchronized execution is maintained by compute elements processing instruction streams in a computer system including the compute elements and a controller. Each compute element includes a clock that operates asynchronously with respect to clocks of the other compute elements. Each compute element processes instructions from an instruction stream and counts the instructions processed. Upon processing a quantum of instructions from the instruction stream, the compute element initiates a synchronization procedure and continues to process instructions from the instruction stream and to count instructions processed from the instruction stream. The compute element halts processing of instructions from the instruction stream after processing an unspecified number of instructions from the instruction stream in addition to the quantum of instructions. Upon halting processing, the compute element sends a synchronization request to the controller and waits for a synchronization reply.
REFERENCES:
patent: 4270168 (1981-05-01), Murphy et al.
patent: 4356546 (1982-10-01), Whiteside et al.
patent: 4358823 (1982-11-01), McDonald et al.
patent: 4449182 (1984-05-01), Rubinson et al.
patent: 4531185 (1985-07-01), Halpern et al.
patent: 4634110 (1987-01-01), Julich et al.
patent: 4812968 (1989-03-01), Poole
patent: 4823256 (1989-04-01), Bishop et al.
patent: 4907228 (1990-03-01), Bruckert et al.
patent: 4920481 (1990-04-01), Binkley et al.
patent: 4937741 (1990-06-01), Harper et al.
patent: 4965717 (1990-10-01), Cutts, Jr. et al.
patent: 5048022 (1991-09-01), Bissett et al.
patent: 5095423 (1992-03-01), Gramlich et al.
patent: 5193175 (1993-03-01), Cutts, Jr. et al.
patent: 5226152 (1993-07-01), Klug et al.
patent: 5239641 (1993-08-01), Horst
patent: 5249187 (1993-09-01), Bruckert et al.
patent: 5251312 (1993-10-01), Sodos
patent: 5255367 (1993-10-01), Bruckert et al.
patent: 5261092 (1993-11-01), McLaughlin et al.
patent: 5276823 (1994-01-01), Cutts, Jr. et al.
patent: 5295258 (1994-03-01), Jewett et al.
patent: 5317726 (1994-05-01), Horst
patent: 5327553 (1994-07-01), Jewett et al.
patent: 5339404 (1994-08-01), Vandling, III
patent: 5600784 (1997-02-01), Bissett et al.
patent: 5615403 (1997-03-01), Bissett et al.
patent: 5790397 (1998-08-01), Bissett et al.
international Search Report dated Sep. 9, 1998.
Integrated Micro Products, "XM-RISC Fault Tolerant Computer System," sales brochure (1992).
Marathon Technologies Corporation, "Fault Tolerant Server I/O Kit," sales brochure.
Marathon Technologies Corporation, "Mial Server Kits," sales brochure.
Marathon Technologies Corporation, Press Release dated Apr. 7, 1997, "Marathon Technologies Now Shipping Industry First Fault Tolerant Windows NT Server Solution," Boxborough, MA.
Marathon Technologies Corporation, "Endurance.TM.: A New Paradigm for the Lowest Cost Fault Tolerant and Site Disaster Tolerant Solutions for PC Server and Cluster Systems," Fault Tolerant Systems--White Paper (Apr. 3, 1997).
Siewiorek et al., Reliable Computer Systems--Design and Evaluation, Second Edition, Digital Equipment Corporation, Digital Press, pp. 618-622 (1992).
Williams, "New Approach Allows Painless Move to Fault Tolerance," Computer Design, May 1992, PennWell Publishing Company.
Bissett Thomas D.
Leveille Paul A.
Muench Erik
Tremblay Glenn A.
Butler Dennis M.
Marathon Technologies Corporation
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