Boots – shoes – and leggings
Patent
1984-09-04
1987-11-24
Harkcom, Gary V.
Boots, shoes, and leggings
371 11, G06F 1516
Patent
active
047093250
ABSTRACT:
In a multiprocessor system comprising a plurality of processor units (11 and 12) which are loosely coupled to one another and which individually carry out processing operations in accordance with control signal sets, respectively, a common memory (15) comprises subareas (33.sub.1 and 33.sub.2) assigned to the processor units and loaded with the control signal sets. Each control signal set is written into each subarea from each main memory (22) included in each processor unit whenever each control signal set is renewed. When a particular one of the processor units falls into disorder and interrupts the processing operation, another of the processor units accesses the subarea assigned to the particular processor unit and loads its main memory with the control signal set of the particular processor unit. Another processor unit thus takes over the processing operation interrupted by the particular processor unit.
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Harkcom Gary V.
Lacasse Randy W.
NEC Corporation
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