Loop prevention in networks

Multiplex communications – Network configuration determination – Using a particular learning algorithm or technique

Reexamination Certificate

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Details

C370S397000

Reexamination Certificate

active

06778506

ABSTRACT:

FIELD OF INVENTION
The present invention is relevant to the prevention of loops in a network. It is particularly relevant to provision of a loopless logical network (especially one in which all nodes are connected) from a physical network which contains loops.
The invention has particular relevance to architectures according to the developing IEEE1394b networking standard.
Prior Art
The IEEE1394 family of standards relate to a bus architecture with a high degree of dynamic configurability. Information relating to these standards can be obtained from the Institute of Electrical and Electronics Engineers, Inc.
In IEEE1394a it is mandated that the wiring topology should not contain any loops otherwise the bus will not function. In this context a loop is defined to be the presence of two or more independent connection paths to a given node via any number of other nodes. As an enhancement for IEEE1394b it is proposed that there should be a mechanism in place which automatically detects the presence of any loops and logically removes them from the bus topology.
Summary of Invention
The invention provides a method for establishing logical connections between nodes in a network, comprising: generation of an identifier by each group of logically connected nodes in the network; exchange of identifiers between physically connected groups of logically connected nodes; and establishment of logical connections between physically connected groups of logically connected nodes for which the exchanged identifiers differ.
In a further aspect, the invention provides method of establishing a network topology without logical loops, comprising: a/ commencing with physical connections, but no logical connections, between nodes; b/ carrying out the method of establishing logical connections as indicated above to provide groups of logically connected modes; and c/ repeatedly carrying out step b/ until all nodes are logically connected.


REFERENCES:
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patent: WO 98/17031 (1998-04-01), None
Anderson, D. (1998), “Firewire System Architecture”, pp. 261-284.
Search Report Dated Oct. 23, 2002, in Corresponding to EP 00303325.
Extract fromRouting Algorithm Issues, pps. 222-223, 1992.

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