Loop optimization compile processing method

Details Loop optimization compile processing method Loop optimization compile processing method

1996-09-27

1998-11-24

Banankhah, Majid A.

395705, G06F 945

Patent

active

058420223

ABSTRACT:
The entire space of a loop is analyzed for dependencies between target array elements so that dependency ID's are assigned to the target array elements. Optimization is carried out on the basis of the dependency ID's. Dependency ID's covering dependency for an arbitrary turn of the loop are reassigned to the target array elements that have been subjected to optimization, whereupon a further optimization is carried out. An examination for identifying overlappings is carried out on the basis of the dependency ID assigned to the target array elements so that instruction scheduling is carried out.

REFERENCES:
patent: 5109331 (1992-04-01), Ishida et al.
"Advanced Compiler Optimizations For SuperComputers", David A. Padua and Michael J. Wolfe; Comm of The ACM. Dec. 1986, vol. 29.
"Compiler Code Transformations for Supercolor-Based High-performance System", Scott A. Mahlke et al., 1992 IEEE.
"Compilers, Principal, Techniques, and Tool", Alfred V. Aho et al., 1986 Bell Tel. Laboratories, Incorp.

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