Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Reexamination Certificate
2002-09-12
2004-10-19
Nguyen, Minh (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synchronizing
C327S552000, C375S376000, C331SDIG002
Reexamination Certificate
active
06806751
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
Embodiments of the present invention relate generally to phase-locked loops. More particularly, embodiments of the present invention provide a loop filter for phase-locked loops and a method for providing a smooth transition when switching between reference clock signals.
2. Description of the Background Art
A phase-locked is the state of synchronization between two signals (e.g., two AC signals) in which they generally remain at the same frequency and with general constant phase difference. Phase-locked is typically applied to a circuit that synchronizes a variable oscillator with an independent signal. Thus, phase-locked pertains to two signals whose phases relative to each other are kept constant by a controlling device. Phase-locked loops are found in a myriad of electronic applications, such as communication receivers and clock synchronization circuits in computer systems for providing a reference signal with a known phase for clocking incoming and out-going data. A phase-locked loop may be broadly described as a circuit for synchronizing a variable local oscillator with the phase of a transmitted signal. It may be more specifically described as a frequency-selective circuit comprising a phase detector (e.g., a phase comparator), a loop filter, and a voltage controlled oscillator (VCO) connected in an arrangement which allows a feed back to the phase detector.
When a reference clock signal is applied to a phase-locked loop, the phase detector compares the phase of the reference signal with the phase of the voltage controlled oscillator output signal and generates an error voltage signal that is related to a phase difference between the reference clock signal and the output signal from the voltage controlled oscillator. This error voltage signal is subsequently filtered in the loop filter and then amplified by an amplifier.
The amplified voltage signal is then applied to the voltage controlled oscillator, thus forcing the frequency of the voltage controlled oscillator to vary in a direction that generally approximates the reference signal frequency. When the voltage controlled oscillator output frequency is in close approximation to the reference signal frequency, the feed back arrangement of the phase-locked loop causes the voltage control oscillator to generally synchronize or to generally “lock” to the reference signal frequency. Therefore, “phase-locked” is achieved by feeding the output of the voltage controlled oscillator back to the phase detector so that a continual error correction may be performed.
The generally self-correcting nature of a phase-locked loop thus permits a system to track any frequency changes of the reference signal once it is locked. However, a phase discontinuity which occurs when switching of clock outputs may be too eruptive for the purpose of the output voltage signal leaving the voltage controlled oscillator. It is desirable to have a smooth phase transition when switching between a reference clock signal and the output signal from the voltage controlled oscillator, especially while being able to compensate for large differences between the reference clock signal and the output signal from the voltage controlled oscillator when initially attempting to “lock” on the incoming reference clock signal. Thus, it is not desirable for the phase-locked loop to react too quickly or to over-correct to large perturbations in the reference clock signal.
SUMMARY OF EMBODIMENTS OF THE INVENTION
Embodiments of the present invention provide a method for operating a phase-locked loop circuit comprising: detecting a phase difference between a feedback signal and an input clock signal having an input clock frequency, producing a phase error signal indicative of the phase difference, and converting the phase error signal into an error correction signal including an error correction frequency having a value approximating the input clock frequency+/−(input clock frequency×a factor ranging from about 0.0001 to about 0.0010). The method for operating a phase-locked loop circuit may also comprise producing an oscillation signal in response to the error correction signal, wherein the oscillation signal is indicative of the feedback signal.
Embodiments of the present invention also provide a method for a phase-locked loop comprising a phase detector receiving a feedback signal and an input clock signal having an input clock frequency and outputting a phase error signal indicative of a comparison between said input clock signal and said feedback signal. A loop filter is coupled to the phase detector to receive the phase error signal and to output an error correction signal having an error correction frequency with a value approximating the input clock frequency+/−(input clock frequency×a factor ranging from about 0.0001 to about 0.0010). The phase-locked loop also comprises a voltage controlled oscillator coupled to the loop filter for receiving the error correction signal and to generate an output signal of the phase-locked loop which is indicative of the feedback signal.
Additional embodiments of the present invention provide a filter/circuitry for a phase-locked loop comprising an amplifier, a first parallel circuit assembly coupled to the amplifier, and a second parallel circuit assembly coupled to the first parallel circuit assembly and connecting across the amplifier.
Further additional embodiments of the present invention provide a method for filtering a phase error signal in a phase-locked loop comprising passing at least part of a phase error signal through a first parallel circuit assembly, amplifying at least part of the phase error signal to produce an error correction signal, passing at least part of the phase error signal through a second parallel circuit assembly, and combining the error correction signal with at least part of the phase error signal which passed through the second parallel circuit assembly.
These provisions together with the various ancillary provisions and features which will become apparent to those artisans possessing skill in the art as the following description proceeds are attained by devices, assemblies, systems and methods of embodiments of the present invention, various embodiments thereof being shown with reference to the accompanying drawings, by way of example only, wherein:
REFERENCES:
patent: 3944940 (1976-03-01), Desai
patent: 4547747 (1985-10-01), Wolaver et al.
patent: 4682116 (1987-07-01), Wolaver et al.
patent: 4748419 (1988-05-01), Somerville
patent: 5260979 (1993-11-01), Parker et al.
patent: 5355090 (1994-10-01), Pajowski et al.
patent: 5726607 (1998-03-01), Brede et al.
patent: 5783971 (1998-07-01), Dekker
patent: 6359945 (2002-03-01), Doblar
patent: 6366146 (2002-04-01), Fredriksson
Foundry Networks Inc.
Ritchie David B.
LandOfFree
Loop filter for a phase-locked loop and method for switching does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Loop filter for a phase-locked loop and method for switching, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Loop filter for a phase-locked loop and method for switching will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3277998