Look-up table using multi-level decode

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Converging with plural inputs and single output

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326106, H03K 1762, H03K 17693

Patent

active

054382955

ABSTRACT:
A look-up table circuit implemented with MOS transistors that uses combinational logic to generate signals that enable the transistors. A circuit using 16 inputs and 4 select lines is disclosed. Two of the select lines are used as inputs to combinational logic including four NOR gates to generate enable signals for transistors in a third stage of the circuit. This produces a reduction in the propagation delay of a signal from the input to the output of the look-up table circuit.

REFERENCES:
patent: 3614327 (1971-10-01), Low
patent: 4453096 (1984-06-01), Le Can
patent: 4910466 (1990-03-01), Kiuchi
patent: 4916336 (1990-04-01), Houston
patent: 5012126 (1991-04-01), Feldbaumer
Principles of CMOS VLSI Design A Systems Perspective; Addison-Wesley Publishing Co., Neil Weste and Kamran Eshraghian p. 361.

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