Look up table implementation of fast carry arithmetic and exclus

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36478601, G06F 750

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active

RE0359777

ABSTRACT:
Look up tables for use in programmable logic devices are modified to facilitate use of those tables to provide adders (including subtracters) and various types of counters. Each look up table is effectively partitioned into smaller look up tables when an adder or counter is required. One portion of the partitioned table is used to provide a sum out signal, while the other portion of the partitioned table is used to provide a fast carry out signal for application to the next stage of the adder or counter. If desired, each logic module including such a look up table may further include logic circuitry for logically combining its normal output with the signal applied to its carry in input to facilitate the provision of wide fan in functions having more inputs than can be accepted by a single logic module.

REFERENCES:
patent: 4124899 (1978-11-01), Birkner et al.
patent: 4623982 (1986-11-01), Ware
patent: 4642487 (1987-02-01), Carter
patent: 4706216 (1987-11-01), Carter
patent: 4742520 (1988-05-01), Hoac et al.
patent: 4758985 (1988-07-01), Carter
patent: 4815022 (1989-03-01), Glaeser et al.
patent: 4870302 (1989-09-01), Freeman
patent: 5053647 (1991-10-01), Shizukuishi et al.
patent: 5059828 (1991-10-01), Tanagawa
patent: 5349250 (1994-09-01), New
patent: 5481206 (1996-01-01), New et al.
E.J. McCluskey, "Iterative Combinational Switching Networks--General Design Considerations:", IRE Transactions on Electronic Computers, Dec. 1958, pp. 285-291.
R.C. Minnick, "A Survey of Microcellular Research", Journal of the Association for Computing Machinery, vol. 14, No. 2, pp. 203-241, Apr. 1967.
Recent Developments in Switching Theory, A. Mukhopadhyay, ed., Academic Press, New York, 1971, chapters VI and IX, pp. 229-254 and 369-422.
H. Fleisher, "An Introduction to Array Logic", IBM Journal of Research and Development, Mar. 1975, pp. 98-109.
B. Kitson et al., "Programmable Logic Chip Rivals Gate Array in Flexibility", Electronic Design, Dec. 8, 1983, pp. 95-102.
"The World's Most Versatile Logic Tool; AmPAL22V10", Advanced Micro Devices, Inc., May 1984.
R.H. Freeman, "XC3000 Family of User-Programmable Gate Arrays", Microprocessors and Microsystems, vol. 13, No. 5, Jun. 1989, pp. 313-320.
D.D. Hill et al., "Preliminary Description of Tabula Rasa, an Electrically Reconfigurable Hardware Engine", Proceedings 1990 IEEE International Conference on Computer Desing: VSLI in Computers and Processors, Sep. 17-19, 1990, pp. 391-395.

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