Look-ahead rounding circuit

Details Look-ahead rounding circuit Look-ahead rounding circuit

1984-04-03

1987-03-03

Malzahn, David H.

Boots, shoes, and leggings

364770, G06F 750

Patent

active

046480587

ABSTRACT:
A high-speed rounding circuit for producing a rounded binary number without using extensive and costly logical AND circuitry. The circuit includes a current-mode logic module in which multiple transistors have their emitter terminals selectively wired together to produce intermediate signals that are the logical OR of the inverted forms of bit position values from the unrounded number. The intermediate signals are then combined with the original unrounded bit position values in logical exclusive OR circuit modules, to produce the desired rounded bit position values in a parallel fashion, but without the need for extensive and costly circuitry.

REFERENCES:
patent: 3549872 (1970-12-01), McElreen
patent: 3906212 (1975-09-01), Poguntke
patent: 3925651 (1975-12-01), Miller
patent: 3989940 (1976-11-01), Kihara
patent: 4041474 (1977-08-01), Can
patent: 4215418 (1980-07-01), Muramatsu
Elliott, "Increment-Decrement Logic" IBM Tech. Disclosure Bulletin, vol. 11, No. 3, pp. 297-298, Aug. 1968.
"Parallel-Array Incrementing Network" IBM Tech. Disclosure Bulletin, vol. 27, No. 11, Apr. 1985, pp. 6450-6453.
"FET Dram Look-Ahead Address Incrementer" IBM Tech. Disclosure Bulletin, vol. 28, No. 1, Jun. 1985, pp. 71-73.

Affiliated with

Also associated with

Rating

Look-ahead rounding circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Look-ahead rounding circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Look-ahead rounding circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1021378