Long-period counter without carries

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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07082453

ABSTRACT:
The present invention is a counter that takes advantage of the speed and implementation of the LFSR counter by utilizing separate digit counters, each digit counter having a period that is a relative prime to the other digit counter periods. The total period will be the product of all the digit counter periods. Since all digits count independently, there is no carry structure between the digits and hence no delay incurred by carry chains. The pseudorandom number counting sequence for each digit still occurs but is ameliorated by the fact that the digital periods are small and can readily be converted to decimal equivalents by table-lookup and residue lookup.

REFERENCES:
patent: 3761696 (1973-09-01), Russell
Alfke, Peter, “Efficient shift registers, LFSR counters, and long pseudo-random sequence generators”, Jul. 7, 1996, p.p. 1-6, Xilinx.

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