Logical waveform generator

Details Logical waveform generator Logical waveform generator

1979-08-24

1982-01-12

Lieberman, Eli

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

328119, 307517, 307518, 364701, H03K 522

Patent

active

043108024

ABSTRACT:
Input logical data is sequentially divided by a data dividing circuit for each time slot into n data trains, of which each data block has an n time slot length. A clock signal which can be arbitrarily timed, is divided by a clock dividing circuit into a n clock signals which are displaced one time slot apart in phase and which occur with a period of n time slots. In a logical circuit, the divided clock signals are controlled by the divided data trains corresponding thereto, and the controlled clock signals are time multiplexed by a multiplexing circuit, whereby output data with which the input logical data has been timed by the clock signal is obtained.

REFERENCES:
patent: 3659044 (1972-04-01), Olson
patent: 3997798 (1976-12-01), Breimesser

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