Boots – shoes – and leggings
Patent
1987-06-08
1991-07-02
Lall, Parshotam S.
Boots, shoes, and leggings
364488, 364200, G06F 1560
Patent
active
050291025
ABSTRACT:
The present invention provides a logic synthesis method and system which begins with a set of register transfer statements describing the desired logic. These statements are converted to expressions in prefix form. Next, logic reduction is performed on the individual expressions. The modified expressions are then converted to a set of logical function blocks, some of which may not be primitive blocks. Logical reduction is performed on the global set of any remaining primitives. The output of the above process is then used to synthesize the logic circuit. Included in the invention are novel techniques for performing logic reduction on the individual expressions.
REFERENCES:
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patent: 4803636 (1989-02-01), Nishiyama et al.
"An Approach to VLSI Logic Design", by L. F. Saunders, European Conference on Electronic Design Automation (EDA 84), IEE 84, 26-30 Mar., 1984, pp. 33-34.
"A New Look at Logic Synthesis", Darringer et al., IEEE 17th D.A. Conference, 1980, pp. 543-549.
"Quality of Designs from an Automatic Logic Generator (Alert)", Friedman et al., IEEE 7th D.A. Conference, 1970, pp. 71-89.
"Methods Used in an Automatic Logic Design Generator (Alert)", Friedman et al., IEEE Trans. on Computers, vol. C-18, No. 7, Jul. 1969, pp. 593-614.
"Minimization of Boolean Functions", F. J. Hill et al., "Introduction to Switch Theory and Logical Design", 1973.
"Experiments in Logic Synthesis", Darringer et al., IEEE-ICCC, 1980.
"Lores-Logic Reorganization System", Nakamura et al., IEEE 15th D.A. Conference, 1978, pp. 250-260.
Drumm Anthony D.
Sweet Charles P.
Galbi Elmer W.
International Business Machines Corp.
Lall Parshotam S.
Samodovitz Arthur J.
Trans V. N.
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