Logical arrangement of memory arrays

Details Logical arrangement of memory arrays Logical arrangement of memory arrays

2006-11-21

2006-11-21

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Format or disposition of elements

C365S063000

Reexamination Certificate

active

07139183

ABSTRACT:
An aspect of the present invention is a logical arrangement of memory arrays. The logical arrangement includes a plurality of memory arrays deposed in a row-column configuration, a controller coupled to the plurality of memory arrays and at least one power line, at least one sense line and at least one address line coupled to the controller wherein a number of connections from the controller to the at least one power line, the at least one sense line and the at least one address line is minimized.

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