Boots – shoes – and leggings
Patent
1984-07-16
1987-10-27
Krass, Errol A.
Boots, shoes, and leggings
364300, 364488, G06F 700, G06F 1560
Patent
active
047034351
ABSTRACT:
Logic is synthesized from a flowchart-level description by first generating an AND/OR logic design, simplifying the AND/OR logic, converting the AND/OR logic to NAND or NOR logic, applying particular sequences of simplifying transformations to the NAND or NOR logic, converting the simplified NAND or NOR logic to a target technology, and simplifying the target technology where possible. The end result is an interconnection of primitives of the target technology in a language from which automated logic diagrams can be produced.
REFERENCES:
patent: 4377849 (1983-03-01), Finger et al.
patent: 4580228 (1986-04-01), Noto
patent: 4591993 (1986-05-01), Griffin et al.
patent: 4612618 (1986-09-01), Pryor et al.
Friedman et al., "Methods used in an Automatic Logic Design Generator (Alert)", IEEE Trans. Comp. C-18, pp. 593-614, 1969.
Mitchell et al., "The Use of High Speed Proms to Generate Boolean Functions,", Wescon Technical Papers, Sep. 1978, pp. 1-7.
Mano, "Digital Logic and Computer Design", Ch. 3, pp. 72-103, 1979.
Introduction to the Automated Synthesis of Computer; Herbert Schorr; Department of Electrical Engineering Digital Systems.
Laboratory Technical Report No. 16 (Mar. 1962). Ph.D. Thesis, Princeton University.
Minimization of Boolean Functions; F. J. Hill et al.; "Introduction to Switch Theory and Logical Design", 1973.
The Description, Simulation, and Automatic Implementation of Digital Computer Processors; John A. Darringer.
The Experimental Compiling System; F. E. Allen; IBM J. Res. Development; vol. 24, No. 6, Nov. 1980.
Logic Synthesis Through Local Transformation; John A. Darringer; IBM Journal of Research and Development; vol. 25, No. 4, Jul. 1981.
Programming Language; Yaohan Chu; vol. 8, No. 10, 10/65.
Development and Application of a Designer Oriented Cyclic Simulator; G. J. Parasch; 13th DA Conference 1976.
Logic Synthesis; Melvin A. Breuer; M. Breuer "Design Automation of Digital Systems", Prentice-Hall 1972.
Synthesis of Combinational Logic Networks; D. L. Dietmeyer "Logic Design of Digital Systems"; Allyn & Bacon, Boston 1978.
Quality of Designs from an Automatic Logic Generator (Alert)*; Theodore D. Friedman and Sih-Chin Yang; 7th DA Conference 1970.
On Logic Comparison; Leonard Berman; 18th DA Conference 1981.
Automated Exploration of the Design Space for Register-Transfer (RT) Systems: Barbacci Mario Roberto;
The Design and Analysis of an Automated Design Style Selector: Thomas Donald Earl, Jr.
Automation of Module Set Independent Register-Transfer Level Design: Edward Alfred Snow, III.
A New Look at Logic Synthesis; John A. Darringer; 17th DA Conference 1980.
Experiments in Logic Synthesis; John A. Darringer; IEEE ICCC 1980.
Methods used in an Automatic Logic Design Generator (Alert); Theodore D. Friedman; IEEE Transactions on Computers; vol. C-18, No. 7, Jul. 1969.
Register-Transfer Level Digital Design Automation: The Allocation Process; Louis Hafer; 15 DA Conference 1978.
The CMU Design Automation System; An Example of Automated Data Path Design; A. Parker et al.; 16 DA Conference 1979.
Lores-Logic Reorganization System; Shunichiro Nakamura et al.; 15 DA Conference 1978.
Translation of a DDL Digital System Specification to Boolean Equations; James R. Duley and Donald L. Dietmeyer, IEEE Trans. on Comp. vol. C-18. No. 14, '69.
DDL-A Digital System Design Language; James Robert Duley; Ph.D. 1967.
Darringer John A.
Joyner, Jr. William H.
Dixon Joseph L.
International Business Machines - Corporation
Krass Errol A.
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