Logic synthesizer

Details Logic synthesizer Logic synthesizer

1993-08-03

1995-08-01

Teska, Kevin J.

Boots, shoes, and leggings

364491, G06F 1750

Patent

active

054385245

ABSTRACT:
An object of the present invention is to obtain a logic synthesizer for generating a net list according to which a layout procedure is simplified. A layout simplifying unit is provided in a stage succeeding to a timing regulating unit. The layout simplifying unit takes in a net list produced by the timing regulating unit and then evaluates a layout aptitude of the net list. If the layout aptitude is NO GOOD, a macro cell replacing process is performed with reference to macro cells registered in a macro cell library, to change the net list. In this way, a net list according to which a layout procedure is simplified can always be produced.

REFERENCES:
patent: 4701860 (1987-10-01), Mader
patent: 4918614 (1990-04-01), Modarres et al.
patent: 4960724 (1990-10-01), Watanabe et al.
patent: 5121336 (1992-06-01), Chang
patent: 5187671 (1993-02-01), Cobb
patent: 5222030 (1993-06-01), Dangelo et al.
patent: 5231590 (1993-07-01), Kumar et al.
patent: 5278769 (1994-01-01), Bair et al.
Proceedings of the IEEE 1989 Custom Integrated Circuits Conference, San Diego, Calif., May 15-18, 1989, Ken Takeya et al, "Generator for High-Density Macrocells with Hierarchical Structure".

Affiliated with

Also associated with

Rating

Logic synthesizer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Logic synthesizer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Logic synthesizer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-737917