Logic synthesis method and system with intermediate circuit file

Details Logic synthesis method and system with intermediate circuit file Logic synthesis method and system with intermediate circuit file

1996-02-07

1999-01-05

Teska, Kevin J.

Boots, shoes, and leggings

364488, 364489, G06F 1750

Patent

active

058569260

ABSTRACT:
An incremental logic synthesis system for generating an optimized circuit from given logic, wherein the optimized circuit satisfies a design constriction. The system includes a logic input device for inputting an old logic, an old circuit generated from the old logic and optimized to satisfy the design constriction, and a new logic partially changing from the old logic file, a logic synthesizing device for generating a first intermediate circuit file from the new logic file, a discriminating device for discriminating a common sub-circuit of the old circuit having an equivalent logic function and an uncommon sub-circuit of the first intermediate circuit having an inconsistent logic function, from the old circuit and the first intermediate circuit, a circuit updating device for generating a second intermediate circuit file by merging the common sub-circuit of the old circuit and the uncommon sub-circuit of the first intermediate circuit, and an optimizing device for optimizing the uncommon sub-circuit of the second intermediate circuit so as to satisfy the design constriction.

REFERENCES:
patent: 5287289 (1994-02-01), Kageyama et al.
patent: 5331569 (1994-07-01), Iijima
patent: 5436849 (1995-07-01), Drumm
patent: 5473547 (1995-12-01), Muroga
patent: 5537330 (1996-07-01), Damiano et al.
patent: 5587919 (1996-12-01), Cheng et al.

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