Logic storing circuit and logic circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

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Details

327203, 327208, 327211, H03K 3289, H03K 3356

Patent

active

058806130

ABSTRACT:
A master portion may introduce input data thereinto in a low level period of a clock and then hold and output the input data therefrom in a high level period of the clock. A slave portion may introduce input data thereinto in the high level period of the clock and then hold and output the input data therefrom in the low level period of the clock. Two exclusive NOR circuits may compare present logic values of the input data with logic values in a preceding half period of the clock to determine coincidences therebetween respectively, and then control output states of the input data held in the master portion and the slave portion based on results of their comparisons.

REFERENCES:
patent: 4495629 (1985-01-01), Zasio et al.
patent: 4506167 (1985-03-01), Little et al.
patent: 4629909 (1986-12-01), Cameron
patent: 5025174 (1991-06-01), Shikata
patent: 5081373 (1992-01-01), Suzuki

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