Logic state analyzer

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Details

3401463WD, G06F 305, G06F 3153

Patent

active

043731937

ABSTRACT:
A logic state analyzer stores into a data acquisition memory only state data meeting preselected qualification state criteria chosen to weed out state data not of interest among the totality of states occuring within a collection of digital signals. The data acquisition memory retains only the last m-many states stored therein. A selectable integer k, o.ltoreq.k.ltoreq.m, determines how many additional storage operations are performed for qualified state data following the detection of a preselected trigger condition. The actual number of states occurring in the collection of digital signals after the trigger condition but before the storage of the kth qualified data state can be many times the value of k. Qualifying the state data prior to storage allows a modest size data acquisition memory to do the work of a much larger memory and spares the user the task of sorting through much state data known not to be of interest. The preselected qualification criteria may include don't-cares in the definition of the qualification state, as well as the logical OR'ing of a plurality of such qualification states.

REFERENCES:
patent: 3406387 (1968-10-01), Werme
patent: 3457552 (1969-07-01), Asendorf et al.
patent: 3988715 (1976-10-01), Mullan et al.
patent: 4100532 (1978-07-01), Farnbach
patent: 4119946 (1978-10-01), Taylor
patent: 4192966 (1980-03-01), Mayer

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