Logic simulation method

Details Logic simulation method Logic simulation method

1994-11-18

1997-01-07

Harrell, Robert B.

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364578, G06F 9455

Patent

active

055926550

ABSTRACT:
For simulation evaluation of combinational logic, changes in input signals are reserved for events occurring with respect to every element of the combinational logic circuit or of a partial circuit within the logic circuit according to demand timing. To inhibit wasteful processes, when the output value of a pertinent element or partial circuit is required by an element included in another partial circuit, i.e. when a demand has been sensed, only then are the events which occurred before evaluation.

REFERENCES:
patent: 5062067 (1991-10-01), Schaefer et al.
24th ACM/IEEE Design Automation Conference, "Demand Driven Simulation: BACKSIM", Smith et al, pp. 181-187.
Advances in CAD for VLSI, vol. 2, pp. 145-146, Jul. 1986.

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