Logic signals control system

Communications: electrical – Land vehicle alarms or indicators – Internal alarm or indicator responsive to a condition of the...

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Details

324 73R, 340799, G08B 536

Patent

active

042491738

ABSTRACT:
The disclosure is of a system including a counter for generating a sequence of logic signals forming a truth table on its output lines. Some of the lines are coupled directly to a memory or buffer and then to a utilization means. Others are coupled through a controllable multiplexer to the memory so that overall, as the counter counts, a desired logic sequence or truth table appears on all of the lines feeding into the memory.
The multiplexer can be operated so that several different sizes of matrices can be scanned by suitably setting the controllable multiplexer, and one use of the invention is for scanning and testing memories of various sizes.

REFERENCES:
patent: 3938130 (1976-02-01), Burnham et al.
patent: 4090188 (1978-05-01), Suga
patent: 4192451 (1980-03-01), Swerling et al.

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