Excavating
Patent
1987-11-13
1990-02-27
Lall, Parshotam S.
Excavating
377 72, H04B 1700
Patent
active
049052411
ABSTRACT:
For assisting the self-test of circuits with unequiplebable random patterns, a logic module is provided which is composed of two types of basic cells. Each basic cell contains a register cell and a sub-circuit composed of gates. Dependent on two control signals, the basic cells can be operated as a normal register, as a shift register or as a linear feedback shift register. In the operational mode as a linear feedback shift register, the logic module can be used as a random pattern generator. To this end, the logic module is divided into a first module and into a second module. The first module contains an interconnection of two types of basic cells and a combinational logic system which operates the one part of the output signals of the basic cell in accordance with a Boolean function. The operational result is supplied to a second module of identical basic cells which operates as a shift register. When a random bit sequence is input into the first module, then all basic cells of the linear feedback shift register are a logical "1" with the probability of 0.5. Following the operation of a portion of the output signals of the basic cells in the combinational logic system, a bit sequence is shifted into the second module, the bit places of this bit sequence being a logical "1" with a probability determined by the Boolean function.
REFERENCES:
patent: 3986168 (1976-10-01), Anderson
patent: 4320509 (1982-03-01), Davidson
patent: 4340857 (1982-07-01), Fasang
patent: 4513418 (1985-04-01), Bardell, Jr. et al.
patent: 4601034 (1986-07-01), Sridhar
patent: 4670877 (1987-06-01), Nishibe
patent: 4687988 (1987-08-01), Eichelberger et al.
patent: 4698830 (1987-10-01), Barzilai et al.
patent: 4701916 (1987-10-01), Naven et al.
patent: 4740970 (1988-04-01), Burrows et al.
patent: 4745355 (1988-05-01), Eichelberger et al.
patent: 4764926 (1989-08-01), Knight et al.
patent: 4779273 (1988-10-01), Beucler et al.
"An Advanced Fault Isolation System for Digital Logic", Benowitz et al., IEEE Trans. on Computer, 161-C24, No. 5, 5/75 pp. 489-497.
"Design for Autonomous Test", McCluskey et al., IEEE Trans. on Computer, vol. C-30, No. 11, 11/81 pp. 866-874.
"Random-Pattern Coverage Enhancement and Diagnosis for LSSD Logic Self-Test", Eichelberger et al., IBM J. Res. Develop.; vol. 27, No. 3, 5/83 pp. 265-272.
Schmid Detlef
Wunderlich Hans-Joachim
Lall Parshotam S.
Melnick S. A.
Siemens Aktiengesellschaft
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