Logic level translator

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307214, 307215, 307218, 307235T, 307DIG1, H03K 1908, H03K 502, H03K 508, H03K 5156

Patent

active

039596664

ABSTRACT:
A logic level translator uses a current switch, a current source and a plurality of cathode followers to convert T.sup.2 L and DTL level binary signals into CML and ECL level binary signals. The translator provides isolation between the T.sup.2 L ground and the CML ground so that noise in the CML signals is reduced.

REFERENCES:
patent: 3329835 (1967-07-01), D'Agostino
patent: 3660676 (1972-05-01), Fleischhammer
patent: 3679917 (1972-07-01), Bryant et al.
patent: 3723761 (1973-03-01), Masaki
patent: 3755693 (1973-08-01), Lee
taylor, "Logic Signal Level Shift Circuit;" IBM Tech. Discl. Bull.; Vol. 12, No. 2; pp. 296; 7/1969.

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