Logic level control for current switch emitter follower logic

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307467, 307356, 307359, 307363, 307296R, H03K 19013, H03K 19086, H03K 1710, H03K 19092

Patent

active

047091690

ABSTRACT:
A logic circuit network with circuitry for independently controlling at least one of the logic levels generated thereby, comprising, in one embodiment, a logic circuit with an output current node, a complement output current node, and at least one input line, the circuit for generating an output voltage level at the output current node which depends on the amount of current drawn therethrough, and for generating a complement output voltage level at the complement output current node which depends on the amount of current drawn therethrough; in combination with a current drawing means for drawing a controlled amount of current through one of those nodes to adjust the voltage level at that node. In one embodiment, this current drawing means is connected to a voltage reference level V.sub.R1, and operates to draw an amount of current from whichever current node is at a voltage level which is closest to a predetermined constant plus this voltage reference level V.sub.R1. The amount of current drawn is controlled to cause this closest node voltage level to approach this predetermined constant plus V.sub.R1. In a preferred embodiment this current drawing means comprises a separate differential amplifier connected to each of the output current nodes.

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Malaviya, "Regulated On-14 Chip Reference Generator for Logic Families", IBM Tech. Discl. Bull., vol. 18, No. 5, pp. 1418-1419, Oct. 1975.

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