Logic compiler for design of circuit models

Details Logic compiler for design of circuit models Logic compiler for design of circuit models

1993-11-01

1994-12-27

Trans, Vincent N.

Boots, shoes, and leggings

364578, G06F 1560

Patent

active

053771222

ABSTRACT:
A logic compiler wherein verification of a generated circuit model is performed automatically by comparing the operation of the circuit model with that of a corresponding mathematical behavior model. A novel user interface and circuit model generation means enables the user to obtain, in real time, performance specifications on the circuit selected by the user as well as incurring other benefits.

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