Logic circuitry having two programmable interconnection arrays

Details Logic circuitry having two programmable interconnection arrays Logic circuitry having two programmable interconnection arrays

1986-02-24

1988-02-23

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307240, 307303, 307468, 34082585, 357 45, H03K 17693

Patent

active

047272686

ABSTRACT:
According to this invention a plurality of kinds of circuit blocks is formed as a circuit block area on a chip substrate to have a desired logic function. An array of signal output wires and array of signal input wires are formed adjacent the circuit block area such that these arrays intersect each other. First switching elements are each formed at a corresponding intersection of the signal output wire and signal input wire. An LSI device having a desired logic function can be implemented by electrically and fixedly writing an ON or OFF state of the first switching element. A first control wire and second control wire are provided adjacent to the circuit block area with the wire arranged parallel to the signal output wire and the wire arranged parallel to the signal input wire. Second switching elements are arranged at intersections of the first control wire and the signal input wires and at intersections of the second control wire and signal output wires. To a given circuit block, the output signals of the other circuit blocks can be supplied in a time-division fashion by controlling the second switching element, in real time, by virtue of a control circuit.

REFERENCES:
patent: 4041459 (1977-08-01), Horninger
patent: 4404663 (1983-09-01), Saeki et al.
patent: 4631686 (1986-12-01), Ikawa et al.
patent: 4642487 (1987-02-01), Carter
patent: 4670749 (1987-06-01), Freeman
patent: 4673966 (1987-06-01), Shimoyawa
Gamblin et al., "Thin-Film Universal Logic Block", IBM T.D.B., vol. 9, No. 6, Nov. 1966, pp. 662-664.

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