Logic circuit using element having negative differential conduct

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307478, H03K 1923, H03K 1900

Patent

active

051534614

ABSTRACT:
A logic circuit includes n input terminals where n is an odd integer, an output terminal, and n input resistance elements respectively connected to the n input terminals. The logic circuit also includes a negative differential conductance element having a negative differential conductance in which the negative differential conductance element outputs a peak voltage and a valley voltage higher than the peak voltage. The negative differential conductance element has a first terminal coupled to the n input terminals via the n input resistance elements, and a second terminal. The negative differential conductance element outputs a first group of voltages lower than the peak voltage to the second terminal when the number of input terminals which are at a low level is greater than the number of input terminals which are at a high level, and outputs a second group of voltages to the second terminal when the number of input terminals which are at the high level is greater than the number of input terminals which are at the low level. Further, the logic circuit includes an output circuit which outputs a first voltage indicating the first group of voltages to the output terminal and which outputs a second voltage indicating the second group of voltages.

REFERENCES:
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patent: 3260841 (1966-07-01), Hayden
patent: 3290517 (1966-12-01), Akmenkalns
patent: 3631260 (1971-12-01), Yoshino
M. Suzuki et al., "Gate Arrays", 1988 IEEE International Solid-State Circuits Conference, ISSCC 88, Wednesday, Feb. 17, 1988, pp. 70-71.
N. Yokoyama et al., "A New Functional, Resonant-Tunnelling Hot Electron Transistor (RHET)", Japanese Journal of Applied Physics, vol. 24, No. 11, Nov., 1985, pp. L853-L854.
T. Futatsugi et al., "A Resonant-Tunnelling Bipolar Transistor (RBT)-A New Functional Device with High Current Gain", Japanese Journal of Applied Physics, vol. 26, No. 2, Feb., 1987, pp. L131-L133.
M. Shur, et al., "New Negative Resistance Regime of Heterostructure Insulated Gate Transistor (HIGFET) Operation", IEEE Electron Device Letters, vol. EDl-7, No. 2, Feb. 1986, pp. 78-80.

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