Logic circuit using depletion mode field effect switching transi

Details Logic circuit using depletion mode field effect switching transi Logic circuit using depletion mode field effect switching transi

1982-09-29

1985-01-01

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307450, H03K 19094, H03K 1920, H03K 19003

Patent

active

044917473

ABSTRACT:
A logic circuit using depletion-mode field effect switching transistors, wherein, a plurality of logic elements respectively having at least one depletion-mode switching FET are connected in series. The source electrodes of the switching FETs are maintained at a voltage higher by a predetermined voltage than ground potential by the Schottky diode and connected commonly to each other. The switching FETs are connected at the drain electrodes through active loads to a power source terminal supplied with one type of external DC power source voltage. The drain potential of the switching FETs is level-shifted to a predetermined voltage higher than the gate potential of the FETs in the next stage. The FETs are provided between the diodes and ground to prevent the variation in the level shift voltage.

REFERENCES:
patent: 3969632 (1976-07-01), Bobenrieth
patent: 4038563 (1977-07-01), Zuleeg et al.
patent: 4400636 (1983-08-01), Andrade
Nuzillat et al., "A Subnanosecond Integrated Switching Circuit with MESFET's for LSI", IEEE JSSC, vol. SC-11, No. 3, Jun. 1976, pp. 385-394.
IEEE Journal of Solid-State Circuits, vol. SC. 13, No. 4, Aug. 1978, R. C. Eden et al., "Planar GaAs IC Technology: Applications for Digitla LSI".
Electronics Letters, vol. 16, No. 19 (Sep. 11, 1980), P. J. T. Mellor et al., "Capacitor-coupled logic using GaAs depletion-mode F.E.T.S.", pp. 749-750.
Elektronik, vol. 30, No. 4 (Feb. 27, 1981), "Integrationsdichte bei GaAs-ICs erhoht", p. 24.
IEEE Spectrum, vol. 14, No. 3, (Mar. 1977), R. Van Tuyl et al., Gallium arsenide spawns speed", pp. 41-47.

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